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參數(shù)資料
| 型號： | M12L32162A |
| 廠商： | Elite Semiconductor Memory Technology Inc. |
| 英文描述： | 1M x 16Bit x 2Banks Synchronous DRAM |
| 中文描述： | 100萬x 16Bit的X 2Banks同步DRAM |
| 文件頁數(shù)： | 12/29頁 |
| 文件大?。?/td> | 719K |
| 代理商： | M12L32162A |
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ES MT
Preliminary
M12L32162A
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Apr. 2007
Revision
:
0.3
12/29
*Note:
1. All inputs expect CKE & DQM can be don’t care when CS is high at the CLK high going edge.
2. Bank active & read/write are controlled by BA.
BA
Active & Read/Write
0
Bank A
1
Bank B
3.Enable and disable auto precharge function are controlled by A10/AP in read/write command.
A10/AP
BA
Operation
0
Disable auto precharge, leave bank A active at end of burst.
0
1
Disable auto precharge, leave bank B active at end of burst.
0
Enable auto precharge, precharge bank A at end of burst.
1
1
Enable auto precharge, precharge bank B at end of burst.
4.A10/AP and BA control bank precharge when precharge command is asserted.
A10/AP
BA
precharge
0
0
Bank A
0
1
Bank B
1
X
Both Banks
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M12L32162A-7BG | 1M x 16Bit x 2Banks Synchronous DRAM |
| M12L32162A-7TG | 1M x 16Bit x 2Banks Synchronous DRAM |
| M12L64164A-5BG | 1M x 16 Bit x 4 Banks Synchronous DRAM |
| M12L64164A-6BG | 1M x 16 Bit x 4 Banks Synchronous DRAM |
| M12L64164A-7BG | 1M x 16 Bit x 4 Banks Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M12L32162A_0712 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM |
| M12L32162A_09 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM |
| M12L32162A-5.5BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM |
| M12L32162A-5.5TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM |
| M12L32162A-6BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 16Bit x 2Banks Synchronous DRAM |
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