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參數(shù)資料
| 型號： | M12L128168A-7TG |
| 廠商： | ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 2M x 16 Bit x 4 Banks Synchronous DRAM |
| 中文描述： | 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | 0.400 INCH, LEAD FREE, TSOP2-54 |
| 文件頁數(shù)： | 28/43頁 |
| 文件大?。?/td> | 804K |
| 代理商： | M12L128168A-7TG |
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ESMT
Note :
1. All input expect CKE & DQM can be don’t care when CS is high at the CLK high going edge.
2. Bank active @ read/write are controlled by A13~A12.
M12L128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
2.0
Publication Date
:
Oct. 2006
28/43
A13
A12
Active & Read/Write
0
0
Bank A
0
1
Bank B
1
0
Bank C
1
1
Bank D
3. Enable and disable auto precharge function are controlled by A10/AP in read/write command
A10/AP
A13
A12
Operating
0
0
Disable auto precharge, leave A bank active at end of burst.
0
1
Disable auto precharge, leave B bank active at end of burst.
1
0
Disable auto precharge, leave C bank active at end of burst.
0
1
1
Disable auto precharge, leave D bank active at end of burst.
0
0
Enable auto precharge , precharge bank A at end of burst.
0
1
Enable auto precharge , precharge bank B at end of burst.
1
0
Enable auto precharge , precharge bank C at end of burst.
1
1
1
Enable auto precharge , precharge bank D at end of burst.
4. A10/AP and A13~A12 control bank precharge when precharge is asserted.
A10/AP
A13
A12
Precharge
0
0
0
Bank A
0
0
1
Bank B
0
1
0
Bank C
0
1
1
Bank D
1
X
X
All Banks
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M12L128324A-7BG | 1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L128324A-7TG | 1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L128324A | 1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L128324A-6BG | 1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L128324A-6TG | 1M x 32 Bit x 4 Banks Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M12L128168A-7TG2L | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:ABSOLUTE MAXIMUM RATINGS |
| M12L128168A-7TIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM |
| M12L128324A | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L128324A_09 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Synchronous DRAM |
| M12L128324A_1 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Synchronous DRAM |
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