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參數(shù)資料
| 型號： | LXT974QC |
| 英文描述： | LAN Transceiver |
| 中文描述： | 網(wǎng)絡(luò)收發(fā)器 |
| 文件頁數(shù)： | 35/68頁 |
| 文件大?。?/td> | 1177K |
| 代理商： | LXT974QC |
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Low-Power Octal PHY
—
LXT9784
Datasheet
35
2.3.2.3
Transmit Driver
The TPOP
n
and TPON
n
lines are implemented with a highly slope-controlled driver that meets the
TP-PMD specifications. The driver either sinks, floats, or drives the TPOP
n
and TPON
n
outputs
with 20 ma of current, depending on whether the ternary signal is -1, 0, or +1. The magnetics
external to the LXT9784 converts this current to voltage levels of 2.0 Vptp, as required by the TP-
PMD specification.
There are four inputs (RBIAS10_0, RBIAS10_1, and RBIAS100_0, RBIAS100_1) to the
LXT9784 that must have external resistor connections to set up voltage biases for the internal
analog section of the LXT9784 PHYs. RBIAS10_0 and RBIAS100_0 provide the bias for PHYs 0
through 3. RBIAS10_1 and RBIAS100_1 provide the bias for PHYs 4 through 7.
2.3.2.4
100BASE-TX Transmit Framing
The LXT9784 PHYs do not differentiate between the fields of the MAC frame containing
preamble, SFD, data and CRC. When TXEN
n
is asserted, the PHY accepts di-bit data on the RMII
TXD
n_
[1:0] lines, or serial stream data on the SMII TXD
n
line.
The PHY encodes the data, and sends it out onto the wire. The PHY substitutes the first byte of the
preamble with the "JK" symbol pair, encodes all other pieces of data according to the 4B/5B
lookup table, and adds the "TR" code after the end of the packet (de-assertion of TXEN
n
transmit
enable indication). The PHY scrambles and serializes the data into a 125 Mbps stream, encodes it
as MLT-3, and drives it onto the wire. If TXER bit in the SMII control word is asserted while
TXEN
n
bit is active, the LXT9784 transmits an invalid "H" symbol.
100BASE-TX RMII Data Transmission
When TXEN
n
is de-asserted, the data on TXD
n_
[1:0] shall be "00" to indicate idle. When TXEN
n
asserts, the PHY accepts di-bit data on the TXD
n_
[1:0] lines. See
Figure 9
.
undefined
Invalid
0 0 0 0 1
Invalid
undefined
Invalid
0 0 0 1 0
Invalid
INVALID
undefined
Invalid
0 0 0 1 1
Invalid
undefined
Invalid
0 0 1 0 1
Invalid
undefined
Invalid
0 1 0 0 0
Invalid
undefined
Invalid
0 1 1 0 0
Invalid
undefined
Invalid
0 1 1 0 0
Invalid
undefined
Invalid
1 0 0 0 0
Invalid
undefined
Invalid
1 1 0 0 1
Invalid
Table 13. 4B/5B Coding (Continued)
Code Type
4B Code
3 2 1 0
Name
5B Code
4 3 2 1 0
Interpretation
1. The /I/ (Idle) code group is sent continuously between frames.
2. The /J/ and /K/ (SSD) code groups are always sent in pairs; /K/ follows /J/.
3. The /T/ and /R/ (ESD) code groups are always sent in pairs; /R/ follows /T/.
4. An /H/ (Error) code group is used to signal an error condition.
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