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參數(shù)資料
| 型號： | LXT360PE |
| 英文描述： | PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC |
| 中文描述： | 的PCM收發(fā)器|單|優(yōu)稅PCM-30/E-1 |的CMOS | LDCC | 28腳|塑料 |
| 文件頁數(shù)： | 20/52頁 |
| 文件大?。?/td> | 1187K |
| 代理商： | LXT360PE |
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LXT361
—
Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
20
Datasheet
With NLOOP detection enabled, the receiver looks for the NLOOP data patterns (00001 = enable,
001 = disable) in the input data stream. When the receiver detects an NLOOP enable data pattern
repeated for a minimum of five seconds, the device enables RLOOP. The device responds to both
framed and unframed NLOOP patterns. Once NLOOP detection is enabled at the chip and
activated by the appropriate data pattern, it is identical to Remote loopback (RLOOP). NLOOP is
disabled by receiving the 001 pattern for five seconds, or by activating RLOOP or ALOOP, or by
disabling NLOOP detection. The device goes into Dual loopback mode (DLOOP) in the case
where it detects both the NLOOP and LLOOP functions.
3.5.1.5
Dual Loopback
See
Figure 8
. To select Dual loopback (DLOOP) set bits CR2.ERLOOP and CR2.ELLOOP to 1. In
DLOOP mode, the transmit clock and data inputs (TCLK and TPOS/TNEG or TDATA) loop back
through the Jitter Attenuator (unless disabled) to RCLK and RPOS/RNEG or RDATA. The data
and clock recovered from the twisted-pair line loop back through the transmit circuits to TTIP and
TRING without jitter attenuation.
3.5.2
Internal Pattern Generation and Detection
3.5.2.1
Transmit All Ones
See
Figure 9
. In Transmit All Ones (TAOS) mode the transceiver ignores the TPOS and TNEG
inputs and transmits a continuous stream of 1s at the TCLK frequency. (With no TCLK, the TAOS
output clock is MCLK.) This can be used as the Alarm Indication Signal (AIS
–
also called the Blue
Alarm). TAOS is commanded by writing a 1 to bit CR2.ETAOS. Both TAOS and Local loopback
can occur simultaneously as shown in
Figure 4
, however, Remote loopback inhibits TAOS. When
both TAOS and LLOOP are active, TCLK and TPOS/TNEG loop back to RCLK and RPOS/RNEG
through the jitter attenuator (if enabled), and an all ones pattern goes to TTIP/TRING.
Figure 8. Dual Loopback
Figure 9. TAOS Data Path
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PDF描述 |
|---|---|
| LXT384BE | Telecomm/Datacomm |
| LXT384LE | Telecomm/Datacomm |
| LXT386BE | PCM TRANSCEIVER|QUAD|CEPT PCM-30/E-1|CMOS|BGA|160PIN|PLASTIC |
| LXT386LE | PCM TRANSCEIVER|QUAD|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC |
| LXT388LE | PCM TRANSCEIVER|DUAL|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXT360QE | 制造商:Intel 功能描述: 制造商:LEVEL ONE 功能描述: |
| LXT361 | 制造商:LVL1 制造商全稱:LVL1 功能描述:Integrated T1/E1 LH/SH Transceivers for DS1/DSX-1/CSU or NTU/ISDN PRI Applications |
| LXT361LE | 制造商:LEVEL ONE 功能描述:361LE |
| LXT361PE | 制造商:LEVEL 1 功能描述: 制造商:LEVEL ONE 功能描述: 制造商:Intel 功能描述:PCM TRANSCEIVER, Single, CEPT PCM-30/E-1, 28 Pin, Plastic, PLCC |
| LXT361QE | 制造商:LEVEL ONE 功能描述: 制造商:LEVEL ONE 功能描述:DATACOM, PCM TRANSCEIVER, PQFP44 |
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