參數(shù)資料
型號(hào): LTC4253ACGN#TRPBF
廠商: Linear Technology
文件頁(yè)數(shù): 3/34頁(yè)
文件大?。?/td> 383K
描述: IC HOT SWAP CONTRLR -48V 16-SSOP
標(biāo)準(zhǔn)包裝: 2,500
類(lèi)型: 熱交換控制器
應(yīng)用: 通用
內(nèi)部開(kāi)關(guān): 無(wú)
電源電壓: 8.2 V ~ 14.5 V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SSOP
包裝: 帶卷 (TR)
LTC4253/LTC4253A
3
425353aff
For more information www.linear.com/4253
ELECTRICAL CHARACTERISTICS
 
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
 = 25癈. (Note 2)
SYMBOL    PARAMETER
CONDITIONS
LTC4253
LTC4253A
UNITS
MIN    TYP   MAX   MIN    TYP   MAX
V
Z
V
IN
  V
EE
 Zener Voltage
I
IN
 = 2mA
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">   11.5    13    14.5   11.5    13    14.5
V
R
Z
V
IN
  V
EE
 Zener Dynamic Impedance
I
IN
 = (2mA to 30mA)
5
5
?/DIV>
I
IN
V
IN
 Supply Current
UV = OV = 4V , V
IN
= (V
Z
  0.3V)
?/DIV>
0.8
2
1.1
2
mA
V
LKO
V
IN
Undervoltage Lockout
Coming Out of UVLO (Rising V
IN
)
?/DIV>
9.2    11.5
9
10
V
V
LKH
V
IN
Undervoltage Lockout Hysteresis
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">   0.5
1
1.5    0.25    0.5    0.75
V
V
IH
TTL Input High Voltage
?/DIV>
2
2
V
V
IL
TTL Input Low Voltage
?/DIV>
0.8
0.8
V
V
HYST
TTL Input Buffer Hysteresis
600
600
mV
I
RESET
RESET Input Current
V
EE
d V
RESET
 d V
IN
?/DIV>
?.1    ?0
?.1    ?0
礎(chǔ)
I
EN
EN2, EN3 Input Current
V
EN
 = 4V V
EN
 = 0V
?
?/DIV>
60
120
?.1
180
?0
60
120
?.1
180
?0
礎(chǔ)
礎(chǔ)
V
CB
Circuit Breaker Current Limit Voltage
V
CB
 = (V
SENSE
  V
EE
)
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">    40
50
60
45
50
55
mV
V
ACL
Analog Current Limit Voltage
V
ACL
 = (V
SENSE
  V
EE
), SS = Open or 2.2V
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">    80
100    120
mV
V
ACL
 V
CB
 
  Analog Current Limit Voltage
Circuit Breaker Current Limit Voltage
V
ACL
 = (V
SENSE
  V
EE
), SS = Open or 1.4V
?/DIV>
1.05   1.20   1.38
V/V
V
FCL
Fast Current Limit Voltage
V
FCL
 = (V
SENSE
  V
EE
)
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">   150    200    300    150    200    300
mV
V
SS
SS Voltage
After End of SS Timing Cycle
?/DIV>
2
2.2
2.4    1.25    1.4    1.55
V
I
SS
SS Pin Current
UV = OV = 4V , V
SENSE
 = V
EE,
V
SS
= 0V (Sourcing)
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">    12
22
32
16
28
40
礎(chǔ)
UV = OV = 0V , V
SENSE
 = V
EE,
V
SS
= 1V (Sinking)
28
28
mA
R
SS
SS Output Impedance
100
50
k?/DIV>
V
OS
Analog Current Limit Offset Voltage
10
10
mV
V
ACL
 + V
OS
  V
SS
 
Ratio (V
ACL
 + V
OS
) to SS Voltage
0.05
0.05
V/V
I
GATE
GATE Pin Output Current
UV = OV = 4V , V
SENSE
 = V
EE
,
V
GATE
 = 0V (Sourcing)
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">    30
50
70
30
50
70
礎(chǔ)
UV = OV = 4V , V
SENSE
  V
EE
 = 0.15V ,
V
GATE
 = 3V (Sinking)
17
17
mA
UV = OV = 4V , V
SENSE
  V
EE
 = 0.3V ,
V
GATE
 = 1V (Sinking)
190
190
mA
V
GATE
External MOSFET Gate Drive
V
GATE
  V
EE,
 I
IN
 = 2mA
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">    10
12
V
Z
10
12
V
Z
V
V
GATEL
Gate Low Threshold
Before Gate Ramp Up
0.5
0.5
V
V
GATEH
Gate High Threshold
V
GATEH
 = V
IN
  V
GATE
, for PWRGD1,
PWRGD2, PWRGD3 Status
2.8
2.8
V
V
UVHI
UV Pin Threshold HIGH
UV Low to High
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">  3.075  3.225  3.375
V
V
UVLO
UV Pin Threshold LOW
UV High to Low
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">  2.775  2.925  3.075
V
V
UV
UV Pin Threshold
UV Low to High
?/DIV>
3.05   3.08   3.11
V
V
UVHST
UV Pin Hysteresis
 
?/DIV>
230    300    350
 
292
 
324
 
356
mV
mV
V
OVHI
OV Pin Threshold HIGH
OV Low to High
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">   5.85   6.15   6.45
V
V
OVLO
OV Pin Threshold LOW
OV High to Low
?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3">   5.55   5.85   6.15
V
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