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參數(shù)資料
| 型號： | LTAEY |
| 廠商： | Linear Integrated Systems |
| 英文描述： | Differential Input 16-Bit No Latency DS ADC |
| 中文描述： | 差分輸入16位ADC的無延遲局副局長 |
| 文件頁數(shù)： | 9/28頁 |
| 文件大?。?/td> | 298K |
| 代理商： | LTAEY |
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LTC2433-1
9
24331fa
The LTC2433-1 performs offset and full-scale calibrations
every conversion cycle. This calibration is transparent to
the user and has no effect on the cyclic operation de-
scribed above. The advantage of continuous calibration is
extreme stability of offset and full-scale readings with re-
spect to time, supply voltage change and temperature drift.
Power-Up Sequence
The LTC2433-1 automatically enters an internal reset state
when the power supply voltage V
CC
drops below approxi-
mately 2V. This feature guarantees the integrity of the
conversion result and of the serial interface mode selec-
tion. (See the 2-wire I/O sections in the Serial Interface
Timing Modes section.)
When the V
CC
voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with a typical duration of 1ms. The POR signal clears
all internal registers. Following the POR signal, the
LTC2433-1 starts a normal conversion cycle and follows
the succession of states described above. The first con-
version result following POR is accurate within the speci-
fications of the device if the power supply voltage is restored
within the operating range (2.7V to 5.5V) before the end of
the POR time interval.
Reference Voltage Range
This converter accepts a truly differential external refer-
ence voltage. The absolute/common mode voltage speci-
fication for the REF
+
and REF
–
pins covers the entire range
from GND to V
CC
. For correct converter operation, the
REF
+
pin must always be more positive than the REF
–
pin.
The LTC2433-1 can accept a differential reference voltage
from 0.1V to V
CC
. The converter output noise is deter-
mined by the thermal noise of the front-end circuits, and
as such, its value in microvolts is nearly constant with
reference voltage. A decrease in reference voltage will
significantly improve the converter’s effective resolution,
since the thermal noise (1.45
μ
V) is well below the quan-
tization level of the device (75.6
μ
V for a 5V reference). At
the minimum reference (100mV) the thermal noise
remains constant at 1.45
μ
V RMS (or 8.7
μ
V
P-P
), while the
quantization is reduced to 1.5
μ
V per LSB. As a result,
lowering the reference improves the effective resolution
for low level input voltages.
Input Voltage Range
The analog input is truly differential with an absolute/
common mode range for the IN
+
and IN
–
input pins
extending from GND – 0.3V to V
CC
+ 0.3V. Outside these
limits, the ESD protection devices begin to turn on and the
errors due to input leakage current increase rapidly. Within
these limits, the LTC2433-1 converts the bipolar differen-
tial input signal, V
IN
= IN
+
– IN
–
, from –FS = –0.5 V
REF
to
+FS = 0.5 V
REF
where V
REF
= REF
+
– REF
–
. Outside this
range, the converter indicates the overrange or the
underrange condition using distinct output codes.
Input signals applied to the analog input pins may extend
by 300mV below ground and above V
CC
. In order to limit
any fault current, resistors of up to 5k may be added in
series with the pins without affecting the performance of
the device. In the physical layout, it is important to main-
tain the parasitic capacitance of the connection between
these series resistors and the corresponding pins as low
as possible; therefore, the resistors should be located as
close as practical to the pins. The effect of the series
resistance on the converter accuracy can be evaluated
from the curves presented in the Input Current/Reference
Current sections. In addition, series resistors will intro-
duce a temperature dependent offset error due to the input
leakage current. A 10nA input leakage current will develop
a 1LSB offset error on an 8k resistor if V
REF
= 5V. This error
has a very strong temperature dependency.
Output Data Format
The LTC2433-1 serial output data stream is 19 bits long.
The first 3 bits represent status information indicating the
conversion state and sign. The next 16 bits are the conver-
sion result, MSB first. The third and fourth bit together are
also used to indicate an underrange condition (the differ-
ential input voltage is below –FS) or an overrange condi-
tion (the differential input voltage is above +FS).
APPLICATIOU
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