參數(shù)資料
型號: LTAEY
廠商: Linear Integrated Systems
英文描述: Differential Input 16-Bit No Latency DS ADC
中文描述: 差分輸入16位ADC的無延遲局副局長
文件頁數(shù): 23/28頁
文件大?。?/td> 298K
代理商: LTAEY
LTC2433-1
23
24331fa
Larger values of reference capacitors (C
REF
> 0.01
μ
F) may
be required as reference filters in certain configurations.
Such capacitors will average the reference sampling charge
and the external source resistance will see a quasi con-
stant reference differential impedance. When F
O
= LOW
(internal oscillator and 50Hz/60Hz notch), the typical
differential reference resistance is 4.2M
which will gen-
erate a gain error of approximately 1LSB full scale for each
120
of source resistance driving REF
+
or REF
. When F
O
is driven by an external oscillator with a frequency f
EOSC
(external conversion clock operation), the typical differen-
tial reference resistance is 0.60 10
12
/f
EOSC
and each
ohm of source resistance drving REF
+
or REF
will result
in 5.1 10
–8
f
EOSC
LSB gain error at full scale. The effect
Figure 19. +FS Error vs R
SOURCE
at REF
+
or REF
(Small C
IN
)
Figure 20. –FS Error vs R
SOURCE
at REF
+
or REF
(Small C
IN
)
Figure 21. +FS Error vs R
SOURCE
at REF
+
and REF
(Large C
REF
)
Figure 22. –FS Error vs R
SOURCE
at REF
+
and REF
(Large C
REF
)
R
SOURCE
(
)
1
10
100
1k
10k
100k
+
24331 F19
0
–1
–2
–3
V
CC
= 5V
REF
= 5V
REF
= GND
IN
+
= 3.75V
IN
= 1.25V
F
O
= GND
T
A
= 25
°
C
C
REF
=
0.01
μ
F
C
REF
=
0.001
μ
F
C
REF
=
100pF
C
REF
=
0pF
R
SOURCE
(
)
1
10
100
1k
10k
100k
24331 F20
3
2
1
0
C
REF
=
0.01
μ
F
C
REF
=
0.001
μ
F
C
REF
=
100pF
C
REF
=
0pF
V
CC
= 5V
REF
= 5V
REF
= GND
IN
+
= 1.25V
IN
= 3.75V
F
O
= GND
T
A
= 25
°
C
R
SOURCE
(
)
0
+
0
–5
–10
800
24331 F21
200
400
600
1000
700
100
300
500
900
V
CC
= 5V
REF
= 5V
REF
= GND
IN
+
= 3.75V
IN
= 1.25V
F
O
= GND
T
A
= 25
°
C
C
REF
= 0.01
μ
F
C
REF
= 1
μ
F
C
REF
= 0.1
μ
F
C
REF
= 10
μ
F
R
SOURCE
(
)
0
10
5
0
800
24331 F22
200
400
600
1000
700
100
300
500
900
V
CC
= 5V
REF
= 5V
REF
= GND
IN
+
= 1.25V
IN
= 3.75V
F
O
= GND
T
A
= 25
°
C
C
REF
= 0.01
μ
F
C
REF
= 1
μ
F
C
REF
= 0.1
μ
F
C
REF
= 10
μ
F
of the source resistance on the two reference pins is
additive with respect to this gain error. The typical +FS and
–FS errors for various combinations of source resistance
seen by the REF
+
and REF
pins and external capacitance
C
REF
connected to these pins are shown in Figures 19, 20,
21 and22.
In addition to this gain error, the converter INL perfor-
mance is degraded by the reference source impedance.
When F
O
= LOW (internal oscillator and 50Hz/60Hz notch),
every 1000
of source resistance driving REF
+
or REF
translates into about 1LSB additional INL error. When F
O
is driven by an external oscillator with a frequency f
EOSC
,
every 1000
of source resistance driving REF
+
or REF
APPLICATIOU
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