參數(shù)資料
型號(hào)： LPC47S42X
廠商： SMSC Corporation
英文描述： ENHANCED SUPER I/O WITH LPC INTERFACE FOR SERVER APPLICATIONS
中文描述： 增強(qiáng)的超級(jí)I /英國(guó)防損為服務(wù)器應(yīng)用接口?
文件頁(yè)數(shù)： 131/264頁(yè)
文件大?。?/td> 1342K
代理商： LPC47S42X
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Keyboard and Mouse PME Generation
The LPC47S42x sets the associated PME Status
bits when the following conditions occur:
Keyboard Interrupt
Mouse Interrupt
Active Edge on Keyboard Data Signal
(KDAT)
Active Edge on Mouse Data Signal
(MDAT)
These events can cause a PME to be generated
if the associated PME Wake Enable register bit
and the global PME_EN bit are set. Refer to the
PME Support section for more details on the
PME interface logic and refer to the Runtime
Register section for details on the PME Status
and Enable registers.
The keyboard interrupt and mouse interrupt
PMEs can be generated when the part is
powered by VCC. The keyboard data and
mouse data PMEs can be generated both when
the part is powered by VCC, and when the part is
powered by VTR (VCC=0).
When using the keyboard and mouse for
wakeup, it may be necessary to isolate the
keyboard and mouse signals (KCLK, KDAT,
MCLK, MDAT) from the 8042 prior to entering
certain system sleep states. This is due to the
fact that the normal operation of the 8042 can
prevent the system from entering or exiting a
sleep state, or trigger false PME events. The
LPC47S42x has “isolation” bits for the keyboard
and mouse signals, which allow the keyboard
and mouse data signals to go into the wakeup
logic but block the keyboard clock and data
signals and the mouse clock and data signals
from the 8042. These bits may be used when it
is necessary to isolate the 8042 keyboard and
mouse signals from the 8042 before entering a
system sleep state.
131
See the SMSC Application Note titled “Using the
Enhanced Keyboard and Mouse Wakeup
Feature in SMSC Super I/O Parts” for more
information.
The bits used to isolate the keyboard and mouse
signals from the 8042 are located in Logical
Device 7, Register 0xF0 (KRST_GA20) and are
defined as follows:
Bit[6] M_ISO. Enables/disables isolation of
mouse signals into 8042. Does not affect the
MDAT signal to the mouse wakeup (PME) logic.
1=block mouse clock and data signals into 8042
0= do not block mouse clock and data signals
into 8042
Bit[5] K_ISO. Enables/disables isolation of
keyboard signals into 8042. Does not affect the
KDAT signal to the keyboard wakeup (PME)
logic.
1= Block keyboard clock and data signals into
8042
0= Do not block keyboard clock and data signals
into 8042
When the keyboard and/or mouse isolation bits
are used, it may be necessary to reset the 8042
upon exiting the sleep state. If either of the
isolation bits is set prior to entering a sleep state
where VCC goes inactive (S3-S5), then the 8042
must be reset upon exiting the sleep mode. Write
0x40 to global configuration register 0x2C to
reset the 8042. The 8042 must then be taken out
of reset by writing 0x00 to register 0x2C since
the bit that resets the 8042 is not self-clearing.
Caution: Bit 6 of configuration register 0x2C is
used to put the 8042 into reset - do not set any of
the other bits in register 0x2C, as this may
produce undesired results.
It is not necessary to reset the 8042 if the
isolation bits are used for a sleep state where
VCC does not go inactive (S1, S2).
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