![](http://datasheet.mmic.net.cn/230000/LM9832CCVJD_datasheet_15593405/LM9832CCVJD_19.png)
19
www.national.com
MISC I/O PIN SETTINGS
59
MISC I/O 1: Input or Output
0 The MISC I/O 1 pin is configured as an input.
1 The MISC I/O 1 pin is configured as an output.
A low input on MISC I/O 1 is True
A high input on MISC I/O 1 is True
Level sensitive: MISC I/O 1 State bit (in Status
Register) is set to a 1 if MISC I/O 1 is currently True.
Edge sensitive: MISC I/O 1 State bit (in Status
Register) is set to a 1 if MISC I/O 1 has been True
since the last time the Status Register was read.
The output of the MISC I/O 1 pin will be a logic low
(0V).
The output of the MISC I/O 1 pin will be a logic high
(5V).
The MISC I/O 2 pin is configured as an input.
The MISC I/O 2 pin is configured as an output.
A low input on MISC I/O 2 is True
A high input on MISC I/O 2 is True
Level sensitive: MISC I/O 2 State bit (in Status
Register) is set to a 1 if MISC I/O 2 is currently True.
Edge sensitive: MISC I/O 2 State bit (in Status
Register) is set to a 1 if MISC I/O 2 has been True
since the last time the Status Register was read.
The output of the MISC I/O 2 pin will be a logic low
(0V).
The output of the MISC I/O 2 pin will be a logic high
(5V).
0 The MISC I/O 3 pin is configured as an input.
1 The MISC I/O 3 pin is configured as an output.
A low input on MISC I/O 3 is True
A high input on MISC I/O 3 is True
Level sensitive: MISC I/O 3 State bit (in Status
Register) is set to a 1 if MISC I/O 3 is currently True.
Edge sensitive: MISC I/O 3 State bit (in Status
Register) is set to a 1 if MISC I/O 3 has been True
since the last time the Status Register was read.
The output of the MISC I/O 3 pin will be a logic low
(0V).
The output of the MISC I/O 3 pin will be a logic high
(5V).
The MISC I/O 4 pin is configured as an input.
The MISC I/O 4 pin is configured as an output.
A low input on MISC I/O 4 is True
A high input on MISC I/O 4 is True
Level sensitive: MISC I/O 4 State bit (in Status
Register) is set to a 1 if MISC I/O 4 is currently True.
Edge sensitive: MISC I/O 4 State bit (in Status
Register) is set to a 1 if MISC I/O 4 has been True
since the last time the Status Register was read.
The output of the MISC I/O 4 pin will be a logic low
(0V).
The output of the MISC I/O 4 pin will be a logic high
(5V).
MISC I/O 1: Polarity
(if configured as an input)
0
1
MISC I/O 1: Level/Edge sensitive
(if configured as an input)
0
1
MISC I/O 1: Output State
(if configured as an output)
Power On/USB Suspend Default: Input
0
1
MISC I/O 2: Input or Output
0
1
MISC I/O 2: Polarity
(if configured as an input)
0
1
MISC I/O 2: Level/Edge sensitive
(if configured as an input)
0
1
MISC I/O 2: Output State
(if configured as an output)
Power On/USB Suspend Default: Input
0
1
5A
(NEW)
MISC I/O 3: Input or Output
MISC I/O 3: Polarity
(if configured as an input)
0
1
MISC I/O 3: Level/Edge sensitive
(if configured as an input)
0
1
MISC I/O 3: Output State
(if configured as an output)
Power On/USB Suspend Default: Input
0
1
MISC I/O 4: Input or Output
0
1
MISC I/O 4: Polarity
(if configured as an input)
0
1
MISC I/O 4: Level/Edge sensitive
(if configured as an input)
0
1
MISC I/O 4: Output State
(if configured as an output)
Power On/USB Suspend Default: Output,
Logic High
0
1
Address
Function
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Value
LM9832 Register Listing
(Continued)
L