參數(shù)資料
型號(hào): LH543611
廠商: Sharp Corporation
英文描述: 512 x 36 x 2 / 1024 x 36 x 2 Synchronous Bidirectional FIFO
中文描述: 512 × 36 x一千○二十四分之二× 36 × 2同步雙向先進(jìn)先出
文件頁(yè)數(shù): 22/57頁(yè)
文件大小: 475K
代理商: LH543611
Table 6. Controllable Functions
TYPE
DESCRIPTION
CONTROL-REGISTER BIT
PORT A
0
1
1
2
3
4
5–6
7
8
PORT B
0
1
9
10
11
12
13
14–15
16
17
Parity
Even/Odd
Policy for 9/18-Bit Word-Width Selection
Generation: Enable/Disable
Flag Behavior: Latched/Flowthrough
EF Synchronous/Asynchronous
AE Synchronous/Asynchronous
HF Synchronous-With-Write/Synchronous-With-Read
AF Synchronous/Asynchronous
FF Synchronous/Asynchronous
Flag Synchronization
NOTE:
1.
LH5420/LH543601 also have this Control-Register function. The same Control-Register bit, bit 00, controls both Port A and Port B functionality.
FLAG
SYNCHRONIZATION
PARITY
PORT B
FF
2
17
18
35
16
15
14
13
12
L
A
T
C
H
P
G
E
N
B
10
11
9
8
P
O
L
I
C
Y
B
7
6
5
4
3
2
1
1
0
AF
2
HF
2
AE
1
EF
1
PF
B
FLAG
SYNCHRONIZATION
PARITY
PARITY
PORT A
FF
1
L
A
T
C
H
P
G
E
N
A
A
B
AF
1
HF
1
AE
2
EF
2
PF
A
35
0
A
B
543611-12
LH5420/LH543601 CONTROL REGISTER (WRITE-ONLY)
(FOR COMPARISON PURPOSES)
LH543611/21 CONTROL REGISTER (READ/WRITE)
E
V
E
N
O
D
D
E
V
E
N
O
D
D
Figure 10. LH5420/LH543601 and LH543611/21
Control-Register Formats
Table 5. Control-Register Format (cont’d)
PORT
COMMAND
REGISTER
BITS
CODE
VALUE
AFTER
RESET
FLAG
AFFECTED,
IF ANY
DESCRIPTION
NOTES
B
16
L
H
L
H
L
AF
2
Set by
CK
B
, reset by
CK
A
.
Set and reset by
CK
B
.
Set by
CK
B
, reset by
CK
A
.
Set and reset by
CK
B
.
Asynchronous flag clocking.
Synchronous flag clocking.
Asynchronous flag clocking.
Synchronous flag clocking.
17
L
FF
2
LH543611/21
512 x 36 x 2/1024 x 36 x 2 BiFIFOs
22
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