- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄358798 > LH543611 (Sharp Corporation) 512 x 36 x 2 / 1024 x 36 x 2 Synchronous Bidirectional FIFO PDF資料下載
參數(shù)資料
| 型號： | LH543611 |
| 廠商： | Sharp Corporation |
| 英文描述： | 512 x 36 x 2 / 1024 x 36 x 2 Synchronous Bidirectional FIFO |
| 中文描述： | 512 × 36 x一千○二十四分之二× 36 × 2同步雙向先進(jìn)先出 |
| 文件頁數(shù)： | 2/57頁 |
| 文件大?。?/td> | 475K |
| 代理商： | LH543611 |
第1頁當(dāng)前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁
Two mailbox registers provide a separate path for
passing control words or status words between ports.
Each mailbox has a New-Mail-Alert Flag, which is syn-
chronized to the reading port’s clock. This mailbox func-
tion facilitates the synchronization of data transfers
between asynchronous systems.
Data-bypass mode allows Port A to directly transfer
data to or from Port B at reset. In this mode, the device
acts as a registered transceiver under the control of
Port A. For instance, a master processor on Port A can
use the data bypass feature to send or receive initializa-
tion or configuration information directly, to or from a
peripheral device on Port B, during system startup.
A word-width-select option is provided on Port B for
36-bit, 18-bit, or 9-bit data access. This feature allows
word-width matching between Port A and Port B, with no
additional logic needed. It also ensures maximum utiliza-
tion of bus band widths. Subject to meeting timing require-
ments, the word-width selection may be changed at any
time during the operation of an LH543611 or LH543621,
without the need either for a reset operation or for passing
dummy words through Port B immediately after the
change; except that if the change is not made at a
full-word boundary, at least one dummy word must be
passed through Port B before any actual data words
are transmitted.
A Byte Parity Check Flag at each port monitors data
integrity. Control-Register bit 00 (zero) selects the parity
mode, odd or even. This bit is initialized for odd data parity
at reset; but it may be reprogrammed for even parity, or
back again to odd parity, as desired. The parity flags may
be programmed to operate either in a latched mode or in
a flowthrough mode. The parity checking may be per-
formed over 36-bit full-words, over 18-bit half-words, or
over 9-bit single bytes.
Parity generation may be selected as well as parity
checking, and may likewise be performed over full-words
or half-words or single bytes. In any case, a parity bit of
the proper mode is generated over the least-significant
eight bits of a byte, and then is stored in the most-signifi-
cant bit position of the byte as it passes through the
LH543611/21, overwriting whatever bit was present in
that bit position previously.
LH543611/21
512 x 36 x 2/1024 x 36 x 2 BiFIFOs
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LH543620 | 1024 x 36 Synchronous FIFO |
| LH5464-NR | 5 mm T1 3/4 LED, Diffused Super-Bright, Hyper-Red GaAIAs-LED |
| LH5464-Q | 5 mm T1 3/4 LED, Diffused Super-Bright, Hyper-Red GaAIAs-LED |
| LH5464-P | 5 mm T1 3/4 LED, Diffused Super-Bright, Hyper-Red GaAIAs-LED |
| LH5464-N | 5 mm T1 3/4 LED, Diffused Super-Bright, Hyper-Red GaAIAs-LED |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH543611M-18 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Synchronous Bidirectional FIFO |
| LH543611M-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Synchronous Bidirectional FIFO |
| LH543611M-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Synchronous Bidirectional FIFO |
| LH543611M-30 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Synchronous Bidirectional FIFO |
| LH543611M-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Synchronous Bidirectional FIFO |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。