參數(shù)資料
型號(hào): LH28F160S3NS-L13
英文描述: EEPROM|FLASH|1MX16/2MX8|CMOS|SOP|56PIN|PLASTIC
中文描述: 的EEPROM | FLASH動(dòng)畫(huà)| 1MX16/2MX8 |的CMOS |專(zhuān)科| 56PIN |塑料
文件頁(yè)數(shù): 44/56頁(yè)
文件大?。?/td> 373K
代理商: LH28F160S3NS-L13
LH28F160S5-L/S5H-L
- 44 -
SYMBOL
t
AVAV
PARAMETER
NOTE
MIN.
70
MAX.
MIN.
90
MAX.
MIN.
100
MAX.
Write Cycle Time
RP# High Recovery to WE#
Going Low
CE# Setup to WE# Going Low
WE# Pulse Width
WP# V
IH
Setup to WE#
Going High
V
PP
Setup to WE# Going High
Address Setup to WE#
Going High
Data Setup to WE# Going High
Data Hold from WE# High
Address Hold from WE# High
CE# Hold from WE# High
WE# Pulse Width High
WE# High to STS Going Low
Write Recovery before Read
V
PP
Hold from Valid SRD,
STS High Z
WP# V
IH
Hold from Valid SRD,
STS High Z
NOTES :
1.
Read timing characteristics during block erase, full chip
erase, (multi) word/byte write and block lock-bit
configuration operations are the same as during read-
only operations. Refer to
Section 6.2.4
CHARACTERISTICS
" for read-only operations.
2.
Sampled, not 100% tested.
3.
Refer to
Table 3
for valid A
IN
and D
IN
for block erase,
full chip erase, (multi) word/byte write or block lock-bit
configuration.
4.
V
PP
should be held at V
PPH1
until determination of block
erase, full chip erase, (multi) word/byte write or block
lock-bit configuration success (SR.1/3/4/5 = 0).
ns
t
PHWL
2
1
1
1
μs
t
ELWL
t
WLWH
10
40
10
40
10
40
ns
ns
t
SHWH
2
100
100
100
ns
t
VPWH
2
100
100
100
ns
t
AVWH
3
40
40
40
ns
t
DVWH
t
WHDX
t
WHAX
t
WHEH
t
WHWL
t
WHRL
t
WHGL
3
40
5
5
10
30
40
5
5
10
30
40
5
5
10
30
ns
ns
ns
ns
ns
ns
ns
90
90
90
0
0
0
t
QVVL
2, 4
0
0
0
ns
t
QVSL
2, 4
0
0
0
ns
VERSIONS
V
CC
±0.25 V
V
CC
±0.5 V
(NOTE 5)
LH28F160S5H-L70
(NOTE 6)
LH28F160S5H-L10
(NOTE 6)
LH28F160S5H-L70
UNIT
V
CC
= 5.0±0.25 V, 5.0±0.5 V, T
A
= –40 to +85°C
"
AC
5.
See
Fig. 12
"
Transient Input/Output Reference
Waveform
" and
Fig. 14
"
Transient Equivalent Testing
Load Circuit
" (High Speed Configuration) for testing
characteristics.
See
Fig. 13
"
Transient Input/Output Reference
Waveform
" and
Fig. 14
"
Transient Equivalent Testing
Load Circuit
" (Standard Configuration) for testing
characteristics.
6.
6.2.5 AC CHARACTERISTICS - WRITE OPERATIONS (contd.)
(NOTE 1)
[LH28F160S5H-L]
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