參數(shù)資料
型號(hào)： LC5521D
元件分類： 穩(wěn)壓器
英文描述： 2.5 A POWER FACTOR CONTROLLER, 18 kHz SWITCHING FREQ-MAX, DIP7
封裝： DIP-8/7
文件頁(yè)數(shù)： 34/40頁(yè)
文件大?。?/td> 888K
代理商： LC5521D
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
28106.02
S/GND
Q
S
R
TSD
LEB
D/ST
FB
STARTUP
Reg
Bias
UVLO
VCC
OCP
OVP
OSC
OCP
Detection
Bottom
Reg
Control
Feedback
OLP
⑧
①
②
③
④
⑥
Drv
⑤
NF
Controller Chip
Figure 3. LC552xD series functional block diagram (for isolated DIP8 designs)
LC552xD Series Terminal List Table
Number
Name
Function
1
S/GND
MOSFET source and GND terminal for the Controller chip
2
VCC
Supply voltage input
3
OCP
Overcurrent Protection and quasi-resonant signal input terminal
4
FB
Feedback signal input and Overload Protection (OLP) signal input
5NF
No function; must be externally connected to S/GND pin with as short
a trace as possible, for stable operation of the device
6
OVP
Overvoltage Protection (OVP) signal input
7
–
Pin removed
8
D/ST
MOSFET drain terminal and input of the startup current
1
2
3
4
8
7
6
5
D/ST
OVP
NF
S/GND
VCC
OCP
FB
Pin-out Diagram
(LC552xD)
S/GND
Q
S
R
TSD
LEB
D/ST
FB
STARTUP
Reg
Bias
UVLO
VCC
OCP
OVP
OSC
OCP
Detection
Bottom
Reg
Control
Feedback
OLP
Drv
④
①
②
⑥
⑦
⑤
Controller Chip
Figure 4. LC552xF series functional block diagram (for isolated TO-220F-7L designs)
LC552xF Series Terminal List Table
Number
Name
Function
1
D/ST
MOSFET drain terminal and input of the startup current
2
S/GND
MOSFET source and GND terminal for the Controller chip
3
NC
No connection
4
VCC
Supply voltage input
5
OCP
Overcurrent Protection and quasi-resonant signal input terminal
6
FB
Feedback signal input and Overload Protection (OLP) signal input
7
OVP
Overvoltage Protection (OVP) signal input
2
3
4
6
1
5
7
D/ST
S/GND
NC
VCC
OCP
FB
OVP
1
2
3
4
5
6
7
D/ST
S/GND
NC
VCC
OCP
FB
OVP
2
4
6
1
3
5
7
D/ST
S/GND
NC
VCC
OCP
FB
OVP
Pin-out Diagrams
(LC552xF)
(LF 3051)
(LF 3052)
(LF 3054)
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