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參數(shù)資料
| 型號： | LC5521D |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 2.5 A POWER FACTOR CONTROLLER, 18 kHz SWITCHING FREQ-MAX, DIP7 |
| 封裝： | DIP-8/7 |
| 文件頁數(shù)： | 31/40頁 |
| 文件大小： | 888K |
| 代理商： | LC5521D |
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37
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
28106.02
susceptible to radiation noise; therefore, widen and shorten it.
Consider the local safety regulations for component layouts
and trace designs where high frequency and voltage appear. In
addition, note that the power MOSFET on-resistance RDS(on) has
a positive characteristic relative to temperature, and therefore,
consider it for thermal design.
Figures 53, 54, and 55 show practical trace design examples and
considerations for the LC551xD, LC552xD and LC552xF series
respectively. In addition, observe the following:
Traces among the S/GND pin, ROCP, C2, T1(primary winding),
and D/ST pin:
The traces carry the switching current; therefore, widen and
shorten them as much as possible.
If the IC and the electrolytic capacitor C2 are apart, place a film
capacitor (0.1 μF with appropriate voltage rating) close to the
IC or the transformer in order to reduce series inductances of
the traces against high frequency current.
Traces among the S/GND pin, C4(–), T1(auxiliary winding D),
R1, D5, C4(+), and VCC pin:
This trace is for supplying voltage to IC. Widen and shorten the
traces as much as possible. If the IC and the electrolytic capaci-
tor C4 are apart, place a film or ceramic capacitor (0.1 to 1.0 μF
/ 50 V) as close to VCC pin and the S/GND pin as possible.
Current Sensing Resistor ROCP:
Place ROCP as close to the S/GND pin as possible. In addi-
tion, in order to avoid interference of the switching current to
the control circuit, connect the ground of the control circuit to
S/GND as close as possible.
Connect R3 as close to ROCP as possible (at point A of figures
53, 54, and 55) with dedicated traces.
Secondary side, traces among T1(secondary winding S), D8,
and C10:
The secondary-side switching current runs through this trace.
Widen and shorten the traces as much as possible.
Thin and long traces cause the series inductance to be high and
it results in high surge voltage on the power MOSFET when
it turns off. Therefore, proper layout pattern design helps to
increase voltage margin of the power MOSFET to its break-
down voltage and reduce power stress and loss of the clamping
snubber circuit.
Figure 53. LC551xD (non-isolated designs) peripheral circuit connection example
Main circuit
Control circuit GND circuit
Secondary rectification circuit
Z1
Con-
troller
Chip
S
D
P
C4
S/GND
OCP
3
1
2
8
D6
ROCP
A
C5
D8
C10
T1
D5
C3
C2
D7
COMP
C6
VCC
D/ST
R1
R3
R4
C7
4
Clamping snubber
LC551xD
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