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參數(shù)資料
| 型號： | LC5521D |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 2.5 A POWER FACTOR CONTROLLER, 18 kHz SWITCHING FREQ-MAX, DIP7 |
| 封裝： | DIP-8/7 |
| 文件頁數(shù)： | 18/40頁 |
| 文件大?。?/td> | 888K |
| 代理商： | LC5521D |
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25
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
28106.02
As shown in figure 32:
If the turn-on point is earlier than the bottom of the VDS signal,
it causes higher switching losses. In that situation, delay the
turn-on point by increasing the C7 value.
In the converse situation, if the turn-on point is later than the
VDS bottom point, it also causes higher switching losses, but in
that case, advance the turn-on point by decreasing the C7 value.
Latch Function
Thermal shutdown (TSD) protection is latched. When the latch
circuit is activated, the IC stops switching operation, and there-
fore the VCC voltage declines.
However, the startup circuit turns on again when VCC reaches
VCC(BIAS)1 = 11.0 V, in order to avoid reaching the operation
Figure 32. Effects of failure to turn on precisely at the VDS bottom point: (left) turn-on too early, (right) turn-on too late
IOFF
V
DS
t
ON
ID
S/GND
V
OCP
S/GND
t
ON
Auxiliary
Winding
Voltage
IOFF
V
DS
ID
V
OCP
Auxiliary
Winding
Voltage
S/GND
VBD(TH2)
VBD(TH1)
S/GND
VBD(TH2)
VBD(TH1)
V
DS
V
DS (peak)
2 × AC mains frequency
AC mains frequency (50 Hz / 60 Hz)
Early turn-on point
Delayed turn-on point
EIN(max)
GND
fR ≈2 √ L
P × CV
1
Bottom point
Free oscillation, fR
Bottom point
Free oscillation, fR
Turn-on occurring after the VDS bottom point
Turn-on occurring before the VDS bottom point
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