參數(shù)資料
型號: L6260
廠商: 意法半導(dǎo)體
英文描述: 4.5 - 5.5V DISK DRIVER SPINDLE & VCM, POWER & CONTROL COMBO’S
中文描述: 4.5 - 5.5V的磁盤驅(qū)動程序主軸
文件頁數(shù): 5/30頁
文件大?。?/td> 305K
代理商: L6260
PIN DESCRIPTION
(continued)
Pin Types:I = Input,O = Output,P = Power, A = Analog(passive)
Power down sequencing, POR, other voltage pins
PIN #
PIN NAME
DESCRIPTION
PIN
TYPE
AO
I\O
MAPPED
No
TRI-STATE
@SLEEP/@POR
No
13
VRECT
Outputofthe synchronous rectifiersupplying power to
theretract circuitry.Filteredby an internal 400pF
capacitor. Normally notexternally connected. However,
ifretract commandisto beused, a small signalsilicon
diodemustbeconnectedbetween thispin andVcc
(Cathode toVRECT)tosupply theadditional current
which mayberequired tobraketheVCM.
An external parallel RC network from this point to
ground sets the Brake dELAY:T= 0.45 RC.
Typical values are R = 4M
, C=0.1
μ
F (0.16sec,
delay).
Voltage triplerreservoir capacitor. Thisis used for
the brake operation when power is removed from
the chip. No DC load allowed. 1
μ
F minimum, 10
μ
F
prefered.
Positive terminal of charge pump capacitor.
10nF (typ) for Tripler operation;
330nF (typ0 or Doubler operation
Negative terminal of charge pump capacitor.
10nF (typ) for Tripler operation;
330nF (typ)or Doubler operation
Positive terminal of charge pump capacitor for
Tripler operation. 330nF (typ).
Connected tp VHRTRIP for Doubleroperation.
Negative terminal of charge pump capacitor for
Tripler operation. 330nF (typ).
Not connected for Doubler operation.
An external capacitor from this pin to ground sets
the duration of POR after power has been re-
established. T (por) = 32 X C (por)
where: C (por) is in pF and T is expresssed in
μ
s.
Power On Reset. This open drain output goes low
when the voltage at either UV1 or UV2 goes below
1.25V.
Under voltage detector 1. This defines the
VOLTAGE GOOD threshold by comparing the
voltage on this pin to the internal 1.25V reference.
An external resistor divider network and capacitor
filter provides the selection of threshold and supply
noise rejection. There is an internal pull-up (2
μ
A
max). Hysteresis is 20mV.
Spindle Disable Delay . A capacitor connected
between this pin and Vcc programs the delay
between POR and the disabling of the Spindle
section..
Delay = 80 xC (C in pF; Delay in
μ
s)
High tripler/Doubler output. 330nF (typ). 11V max.
Low tripler/Doubler output. 330nF (typ). for stability.
28
BRK_DLY
A
No
No
30
VPDOWN
A
No
No
61
C1HIGH
A
No
No
62
C1LOW
A
No
No
64
C2HIGH
A
No
No
2
C2LOW
A
No
No
52
POR_DLY
A
No
No
5
POR
DO
Yes
No
50
UV1
AI
Yes
No
51
SPN_DSBL_
DLY
AI
Yes
No
4
3
VHTRIP
VLTRIP
AO
AO
No
No
No
No
L6260
5/30
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