參數(shù)資料
型號: L6260
廠商: 意法半導體
英文描述: 4.5 - 5.5V DISK DRIVER SPINDLE & VCM, POWER & CONTROL COMBO’S
中文描述: 4.5 - 5.5V的磁盤驅(qū)動程序主軸
文件頁數(shù): 20/30頁
文件大小: 305K
代理商: L6260
certain transient conditions, the control loop which
regulatesthe load current can recirculate, causing
the VCM_I_SNS voltage to be different from the
commanded voltage. This information is useful in
optimizing the command profile during a seek.
The retractvoltageis set by externalcomponents.
The current loop bandwidth is greater than
20Khertz.
VCM DAC
The VCM DAC consists of 10 bits via the DAC, 1
bit sign and 1 gain bit. However, externally this
can be viewed as being a single 11 bit signed
value with a gain bit in the MSB position. The sign
bit controls the direction of the current. Positive
values of the DAC are regarded as moving the
actuator towards the inside diameter (this is re-
quired for parking/braking).The magnitude is con-
verted to a voltage which is used for closed loop
regulation of the magnitude of the load current.
The gain bit
Retract
Automaticactuator retraction is initiated when any
of the following conditions occur: disabling the
spin system while the VCM system is still en-
abled, excessive junction temperature (thermal
shutdown), loss of power or microprocessor is-
sued retract. In all cases except the loss of
power, the voltage applied to the voice coil is lim-
ited by an active clamp. When power is lost, the
BEMF generated by the spinning motor is recti-
fied and applied across the voice coil to perform
the parking operation.
Command retract is activated via the System
Control Register.
VCM Gain Considerations
I
OUT
=
±
0.25
DAC_VALUE
1024
1
R
S1
(High current
setting)
or
I
OUT
=
±
0.25
DAC_VALUE
current
1024
1
R
S1
+
R
S2
(Low
setting)
Modes of Operation
The L6260 provides for four different modes of
operation, namely, Unipolar, Bipolar, Tripolar and
Tristate. The Tripolar mode is included for achiev-
ing reliable start-ups in a stuck rotor condition
(lengthening drive life-time). These modes are in-
itiated via the System Control Register A, bits 7 &
8 asfollows:
Bit 6
0
0
1
1
Bit 7
0
1
0
1
# of driverson
Tristate
Unipolar
Bipolar
Tripolar
None
1 low side, no high side
1 low side and 1 high side
1 high side and2 low side
OR 2 high side and 1 low
side
Spindle compensationand Loop Equations
This material will be available in the next version
of thisdatasheet.
Spindle StateMachine
The spindle state machine provides the logic and
timing signals to the spindle driver in support of
the various modes of operation.
When the spindle driver is disabled (via the Sys-
tem Control Register), the state machine puts the
spindle driver into a high impedance mode and
places all spindle related circuit into a reduced
power mode.
After a POR, at boot up or after RESET (via Sys-
tem Control Register) the state machine is in the
known state as defined by the System Control
Registers (A & B) initial condition after POR (see
the @POR columnof theseregisters).
When in Unipolar mode the commutation se-
quence is CTR/lA, CTR/lB CTR/lC where lA =
lower A driver (NOTE: Unipolar mode is only
guaranteed at 3V operation). In Bipolar the com-
mutation sequence is uA/lB (upper A and lower
B), uA/lC, lC/uB, uB/lA, lA/uC and uC/lB. In Tripo-
lar mode the state machine does not auto com-
mutate, the microprocessor must increment the
state. The sequence is uA/lBC (upper A and
lower B & C), uAB/lC, uB/lAC, uCB/lA, uC/lAB
and uAC/lB. The Uni/Bi/Tri-polar operation is set
by two bits in the SystemControl Register A (3.7-
3.8) described above (Modes of Operation).
If the RUN/SEARCH bit (System Control Register
A, bit 4) is false or 0 (SEARCH mode), the com-
mutation state only increments when the INC
STATE bit is strobed (also in the same register,
bit 3). If the RUN/SEARCH bit is true or 1 (RUN
mode) the state will increment either on a INC
STATE strobe or if a qualified BEMF CROSSING
occurs the state will increment after the commuta-
tion delay times out.
If either THERMAL=1 (register.bit 0.0) or the
POR=0, all the drivers are turned off. Tristate is
the default mode of operationat power up.
Period counters and delay and masking func-
tions
The period counter is an internal 11 bit register
that is used to time the interval between succes-
sive zero crossings. Whenever a zero crossing is
encountered, the period counter is loaded into
L6260
20/30
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