MPC8240 Integrated Processor Hardware Specifications
23
Electrical and Thermal Characteristics
Figure 15. I2C Timing Diagram III
Figure 16. I2C Timing Diagram IV (Qualified Signal)
1.4.2.6
PIC Serial Interrupt Mode AC Timing Specifications
Table 14 provides the PIC serial interrupt mode AC timing specifications for the MPC8240.
Table 14. PIC Serial Interrupt Mode AC Timing Specifications
At recommended operating conditions (see Table 2) with LVDD = 3.3 V ± 0.3 V Num
Characteristic
Min
Max
Unit
Notes
1
S_CLK frequency
1/14 SDRAM_SYNC_IN
1/2 SDRAM_SYNC_IN
MHz
1
2
S_CLK duty cycle
40
60
%
3
S_CLK output valid time
—
6
ns
4
Output hold time
0
—
ns
5S_FRAME, S_RST output valid
time
—1 sys_logic_clk period + 6
ns
2
6
S_INT input setup time to S_CLK
1 sys_logic_clk period + 2
—
ns
2
Input Data Valid
DFFSR FILTER CLK 1
SDA
7
Note:
1. DFFSR filter clock is the SDRAM_CLK clock times DFFSR value.
SCL/SDArealtime
VM
SCL/SDAqualified
VM
Delay 1
Note:
1. The delay is the local memory clock times DFFSR times 2 plus 1 local memory clock.
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Freescale Semiconductor, Inc.
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