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參數(shù)資料
型號(hào): KSZ8995XA-EVAL
廠商: Micrel Inc
文件頁數(shù): 3/51頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR KSZ8995XA
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8995XA
主要屬性: 5 個(gè)端口,100BASE-TX/100BASE-FX/10BASE-T
次要屬性: 2xMII,SNI
已供物品: 板,CD,文檔,電源
產(chǎn)品目錄頁面: 1114 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: KSZ8995XAB3-ND - IC SWITCH 5-PORT 10/100 128PQFP
KSZ8995XA4-ND - IC SWITCH 5-PORT 10/100 128PQFP
576-1042-ND - IC SWITCH 10/100 5PORT 128PQFP
576-1041-ND - IC SWITCH 10/100 5PORT 128PQFP
其它名稱: 576-1642
May 2005
11
M9999-051305
KS8995XA
Micrel, Inc.
Pin Number
Pin Name
Type(1)
Port
Pin Function(2)
86
SCONF1
Ipd
Dual MII configuration pin.
Pin# (91, 86, 87):
Switch MII
PHY [5] MII
000
Disable, Otri
001
PHY Mode MII
Disable, Otri
010
MAC Mode MII
Disable, Otri
011
PHY Mode SNI
Disable, Otri
100
Disable
101
PHY Mode MII
110
MAC Mode MII
PHY Mode MII
111
PHY Mode SNI
PHY Mode MII
87
SCONF0
Ipd
Dual MII configuration pin.
88
GNDD
Gnd
Digital ground.
89
VDDC
P
1.8V digital core V
DD.
90
LED5-2
Ipu/O
5
LED indicator 2. Aging setup. See “Aging” section.
91
LED5-1
Ipu/O
5
LED indicator 1. Strap option: PU (default): enable PHY MII I/F.
PD: tristate all PHY MII output. See “Pin# 86 SCONF1.”
92
LED5-0
Ipu/O
5
LED indicator 0.
93
LED4-2
Ipu/O
4
LED indicator 2.
94
LED4-1
Ipu/O
4
LED indicator 1.
95
LED4-0
Ipu/O
4
LED indicator 0.
96
LED3-2
Ipu/O
3
LED indicator 2.
97
LED3-1
Ipu/O
3
LED indicator 1.
98
LED3-0
Ipu/O
3
LED indicator 0.
99
GNDD
Gnd
Digital ground.
100
VDDIO
P
3.3V digital V
DD for digital I/O.
101
LED2-2
Ipu/O
2
LED indicator 2.
102
LED2-1
Ipu/O
2
LED indicator 1.
103
LED2-0
Ipu/O
2
LED indicator 0.
104
LED1-2
Ipu/O
1
LED indicator 2.
105
LED1-1
Ipu/O
1
LED indicator 1.
106
LED1-0
Ipu/O
1
LED indicator 0.
107
MDC
Ipu
All
Switch or PHY[5] MII management data clock.
108
MDIO
Ipu/O
All
Switch or PHY[5] MII management data I/O.
Notes:
1. P = Power supply.
I = Input.
O = Output.
I/O = Bidirectional.
Gnd = Ground.
Ipu = Input w/internal pull-up.
Ipd = Input w/internal pull-down.
Ipd/O = Input w/internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/internal pull-up during reset, output pin otherwise.
2. PU = Strap pin pull-up.
PD = Strap pull-down.
Otri = Output tristated.
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