hbwhelp@micrel.com or (408) 955-1690 3-0 Receive high" />
參數(shù)資料
型號(hào): KSZ8993FL
廠商: Micrel Inc
文件頁(yè)數(shù): 59/100頁(yè)
文件大小: 0K
描述: IC CONV MED 10/100 SGL 128PQFP
標(biāo)準(zhǔn)包裝: 66
系列: *
類型: *
應(yīng)用: *
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 1081 (CN2011-ZH PDF)
其它名稱: 576-1035
Micrel, Inc.
KS8993F/FL
June 2009
61
M9999-062509
hbwhelp@micrel.com or (408) 955-1690
3-0
Receive high
priority rate
control [11:8]
R/W
These bits along with port control 8, bits [7:0] form a 12-bits
field to determine how many “32Kbps” high priority blocks can
be received. (in a unit of 4K bytes in a one second period)
0x0
Register 27 (0x1B): Port 1 Control 11
Register 43 (0x2B): Port 2 Control 11
Register 59 (0x3B): Port 3 Control 11
Bit
Name
R/W
Description
Default
7
Receive
differential
priority rate
control
R/W
= 1, If bit 6 is also ‘1’, this will enable receive rate control for
this port on low priority packets at the low priority rate. If
bit 5 is also ‘1’, this will enable receive rate control on high
priority packets at the high priority rate.
= 0, receive rate control will be based on the low priority rate
for all packets on this port.
0
6
Low priority
receive rate
control
enable
R/W
= 1, enable port’s low priority receive rate control feature
= 0, disable port’s low priority receive rate control feature
0
5
High priority
receive rate
control
enable
R/W
= 1, If bit 7 is also ‘1’, this will enable the port’s high priority
receive rate control feature. If bit 7 is a ‘0’ and bit 6 is a
‘1’, all receive packets on this port will be rate controlled
at the low priority rate.
= 0, disable port’s high priority receive rate control feature
0
4
Low priority
receive rate
flow control
enable
R/W
= 1, flow control may be asserted if the port’s low priority
receive rate is exceeded
= 0, flow control is not asserted if the port’s low priority receive
rate is exceeded
0
3
High priority
receive rate
flow control
enable
R/W
= 1, flow control may be asserted if the port’s high priority
receive rate is exceeded. (to use this, differential receive
rate control must be ON)
= 0, flow control is not asserted if the port’s high priority
receive rate is exceeded.
0
2
Transmit
differential
priority rate
control
R/W
= 1, will do transmit rate control on both high and low priority
packets based on the rate counters defined by the high
and low priority packets respectively.
= 0, will do transmit rate control on any packets. The rate
counters defined in low priority will be used.
0
1
Low priority
transmit rate
control
enable
R/W
= 1, enable the port’s low priority transmit rate control feature
= 0, disable the port’s low priority transmit rate control feature
0
High priority
transmit rate
control
enable
R/W
= 1, enable the port’s high priority transmit rate control feature
= 0, disable the port’s high priority transmit rate control feature
0
NOTE: Port Control Registers 12 and 13, and Port Status Register 0 contents can also be
accessed with the MIIM (MDC/MDIO) interface via the standard MIIM registers.
Register 28 (0x1C): Port 1 Control 12
Register 44 (0x2C): Port 2 Control 12
Register 60 (0x3C): Reserved, not applied to port 3
Bit
Name
R/W
Description
Default
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