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參數(shù)資料
型號(hào): KSZ8993FL
廠商: Micrel Inc
文件頁數(shù): 49/100頁
文件大小: 0K
描述: IC CONV MED 10/100 SGL 128PQFP
標(biāo)準(zhǔn)包裝: 66
系列: *
類型: *
應(yīng)用: *
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
其它名稱: 576-1035
Micrel, Inc.
KS8993F/FL
June 2009
52
M9999-062509
hbwhelp@micrel.com or (408) 955-1690
>= : classified as high priority
<
: classified as low priority
3
Pass flow
control
packet
R/W
= 1, switch will not filter 802.1x “flow control” packets
0x0
2
Buffer share
mode
R/W
= 1, buffer pool is shared by all ports. A port can use more buffer
when other ports are not busy.
= 0, a port is only allowed to use 1/3 of the buffer pool
0x1
1
Reserved
R/W
Reserved
0
Link change
age
R/W
= 1, link change from “l(fā)ink” to “no link” will cause fast aging
(<800us) to age address table faster. After an age cycle is
complete, the age logic will return to normal (about 200
seconds).
Note: If any port is unplugged, all addresses will be automatically aged
out.
0
Register 3 (0x03): Global Control 1
Bit
Name
R/W
Description
Default
7
Pass all
frames
R/W
= 1, switch all packets including bad ones. Used solely for
debugging purposes. Works in conjunction with Sniffer
mode only.
0
6
Repeater
Mode
R/W
= 0, normal mode
= 1, repeater mode (Half duplex Hub mode)
0
5
IEEE 802.3x
Transmit
direction flow
control
enable
R/W
= 1, will enable transmit direction flow control feature.
= 0, will not enable transmit direction flow control feature. Switch
will not generate any flow control packets.
1
4
IEEE 802.3x
Receive
direction flow
control
enable
R/W
= 1, will enable receive direction flow control feature.
= 0, will not enable receive direction flow control feature. Switch
will not react to any received flow control packets.
1
3
Frame
Length field
check
R/W
= 1, will check frame length field in the IEEE packets. If the
actual length does not match, the packet will be dropped
(for Length/Type field < 1500).
0
2
Aging enable
R/W
= 1, enable age function in the chip
= 0, disable age function in the chip
1
Fast age
enable
R/W
= 1, turn on fast age (800 us)
0
Aggressive
back off
enable
R/W
= 1, enable more aggressive back off algorithm in half duplex
mode to enhance performance. This is not an IEEE
standard.
SMAC
(pin 69)
value during
reset
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