參數(shù)資料
型號(hào): KSZ8851-16MQL
廠商: Micrel Inc
文件頁(yè)數(shù): 52/88頁(yè)
文件大?。?/td> 0K
描述: IC CTLR MAC/PHY NON-PCI 128-PQFP
產(chǎn)品培訓(xùn)模塊: KSZ8851 10/100 Embedded Controllers
標(biāo)準(zhǔn)包裝: 66
控制器類(lèi)型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線(xiàn)
電源電壓: 1.8V,2.5V,3.3V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 1081 (CN2011-ZH PDF)
配用: 576-3292-ND - BOARD EVALUATION KSZ8851-16MLL
其它名稱(chēng): 576-3253
PIC16F8X
1998 Microchip Technology Inc.
DS30430C-page 57
9.1
Instruction Descriptions
ADDLW
Add Literal and W
Syntax:
[
label] ADDLW
k
Operands:
0
≤ k ≤ 255
Operation:
(W) + k
→ (W)
Status Affected:
C, DC, Z
Encoding:
11
111x
kkkk
Description:
The contents of the W register are
added to the eight bit literal ’k’ and the
result is placed in the W register
.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
literal ’k’
Process
data
Write to
W
Example:
ADDLW
0x15
Before Instruction
W
=
0x10
After Instruction
W
=
0x25
ADDWF
Add W and f
Syntax:
[
label] ADDWF
f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(W) + (f)
→ (destination)
Status Affected:
C, DC, Z
Encoding:
00
0111
dfff
ffff
Description:
Add the contents of the W register with
register ’f’. If ’d’ is 0 the result is stored
in the W register. If ’d’ is 1 the result is
stored back in register ’f’
.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register
’f’
Process
data
Write to
destination
Example
ADDWF
FSR,
0
Before Instruction
W
=
0x17
FSR =
0xC2
After Instruction
W=
0xD9
FSR =
0xC2
ANDLW
AND Literal with W
Syntax:
[
label] ANDLW
k
Operands:
0
≤ k ≤ 255
Operation:
(W) .AND. (k)
→ (W)
Status Affected:
Z
Encoding:
11
1001
kkkk
Description:
The contents of W register are
AND’ed with the eight bit literal 'k'. The
result is placed in the W register
.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
literal "k"
Process
data
Write to
W
Example
ANDLW
0x5F
Before Instruction
W=
0xA3
After Instruction
W
=
0x03
ANDWF
AND W with f
Syntax:
[
label] ANDWF
f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(W) .AND. (f)
→ (destination)
Status Affected:
Z
Encoding:
00
0101
dfff
ffff
Description:
AND the W register with register 'f'. If 'd'
is 0 the result is stored in the W regis-
ter. If 'd' is 1 the result is stored back in
register 'f'
.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register
’f’
Process
data
Write to
destination
Example
ANDWF
FSR,
1
Before Instruction
W
=
0x17
FSR =
0xC2
After Instruction
W
=
0x17
FSR =
0x02
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