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參數(shù)資料
| 型號： | KS57P21832 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | CMOS technology provides for low power consumption and a wide operating voltage range. |
| 中文描述： | CMOS技術(shù)提供了低功耗和寬工作電壓范圍。 |
| 文件頁數(shù)： | 5/34頁 |
| 文件大?。?/td> | 274K |
| 代理商： | KS57P21832 |
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KS57C21832/P21832
PRODUCT OVERVIEW
1-5
PIN DESCRIPTIONS
Table 1-1. KS57C21832 Pin Descriptions
Pin Name
P0.0
P0.1
P0.2
P0.3
Pin Type
I/O
Description
Number
11
12
13
14
Share Pin
SCK
/K0
SO/K1
SI/K2
BUZ/K3
4-bit I/O port.
1-bit and 4-bit read/write and test are possible.
Individual pins are software configurable as input or
output.
Individual pins are software configurable as open-
drain or push-pull output.
4-bit pull-up resistors are software assignable; pull-up
resistors are automatically disabled for output pins.
4-bit input port.
1-bit and 4-bit read and test are possible.
4-bit pull-up resistors are assignable by software.
P1.0
P1.1
P1.2
P1.3
P2.0
P2.1
P2.2
P3.0
P3.1
P3.2
P3.3
P4.0-P4.3
I
23
24
25
26
27
28
29
30
31
32
33
INT0
INT1
INT2
INT4
CLO
LCDCK
LCDSY
TCLO0
TCLO1
TCL0
TCL1
COM8-
COM11
COM12-
COM15
I/O
Same as port 0 except that port 2 is 3-bit I/O port.
I/O
Same as port 0.
P5.0-P5.3
I/O
4-bit I/O ports.
1-, 4-bit or 8-bit read/write and test are possible.
Individual pins are software configurable as input or
output.
4-bit pull-up resistors are software assignable; pull-up
resistors are automatically disabled for output pins.
Same as P4, P5.
42-45
46-49
P6.0-P6.3
P7.0-P7.3
I/O
50-53
54-57
SEG55/K4-
SEG52/K7
SEG51-
SEG48
SEG47-
SEG44
SEG43-
SEG40
P0.0/K0
P0.1/K1
P0.2/K2
P0.3/K3
P8.0-P8.3
P9.0-P9.3
I/O
Same as P4, P5.
58-61
62-65
SCK
SO
SI
BUZ
I/O
I/O
I/O
I/O
Serial I/O interface clock signal.
Serial data output.
Serial data input.
2 kHz, 4 kHz, 8 kHz or 16 kHz frequency output for
buzzer signal.
External interrupts. The triggering edge for INT0 and
INT1 is selectable.
11
12
13
14
INT0, INT1
I
23, 24
P1.0, P1.1
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