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參數(shù)資料
| 型號： | KS57P21832 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | CMOS technology provides for low power consumption and a wide operating voltage range. |
| 中文描述： | CMOS技術(shù)提供了低功耗和寬工作電壓范圍。 |
| 文件頁數(shù)： | 22/34頁 |
| 文件大?。?/td> | 274K |
| 代理商： | KS57P21832 |
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ELECTRICAL DATA
KS57C21832/P21832
14-10
Table 14-8. RAM Data Retention Supply Voltage in Stop Mode
(T
A
= - 40
°
C to + 85
°
C)
Parameter
Symbol
V
DDDR
I
DDDR
Conditions
–
Min
1.8
Typ
–
Max
5.5
Unit
V
Data retention supply voltage
Data retention supply current
V
DDDR
= 1.8 V
–
0.1
10
μA
Release signal set time
t
SREL
t
WAIT
–
0
–
–
μs
Oscillator stabilization wait
time
(1)
Released by
RESET
–
2
17
/fx
–
ms
Released by interrupt
–
(2)
–
NOTES
:
1.
During oscillator stabilization wait time, all CPU operations must be stopped to avoid instability during oscillator
start-up.
Use the basic timer mode register (BMOD) interval timer to delay execution of CPU instructions during the wait time.
2.
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