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參數(shù)資料
| 型號： | KM418RD32D |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM |
| 中文描述： | 128/144Mbit RDRAM的256 × 16/18位× 2 * 16屬銀行直接RDRAMTM |
| 文件頁數(shù)： | 18/64頁 |
| 文件大?。?/td> | 4052K |
| 代理商： | KM418RD32D |
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Page 15
KM416RD8AC(D)/KM418RD8AC(D)
Direct RDRAM
Rev. 1.01 Oct. 1999
COL-to-ROW Packet Interaction
Figure 9 shows arbitrary packets on the COL and ROW pins.
They must be separated by an interval t
CRDELAY
which
depends upon the command and address values in the
packets. Table 13 summarizes the t
CRDELAY
value for all
possible cases.
Cases CR1, CR2, CR3, and CR9 show no interaction
between the COL and ROW packets, either because one of
the commands is a NOP or because the packets are directed
to different devices or to non-adjacent banks.
Case CR4 is illegal because an already-activated bank is to
be re-activated without being precharged Case CR5 is illegal
because an adjacent bank can’t be activated or precharged
until bank Ba is precharged first.
In case CR6, the COLC packet contains a RD command, and
the ROW packet contains a PRER command for the same
bank. The t
RDP
parameter specifies the required spacing.
Likewise, in case CR7, the COLC packet causes an auto-
matic retire to take place, and the ROW packet contains a
PRER command for the same bank. The t
RTP
parameter
specifies the required spacing.
Case CR8 is labeled
“
Hazardous
”
because a WR command
should always be followed by an automatic retire before a
precharge is scheduled. Figure 19 shows an example of what
can happen when the retire is not able to happen before the
precharge.
For the purposes of analyzing COL-to-ROW interactions,
the PREC, WRA, and RDA commands of the COLC packet
are equivalent to the NOCOP, WR, and RD commands.
These commands also cause a precharge operation to take
place. This precharge may converted to an equivalent PRER
command on the ROW pins using the rules summarized in
Figure 14.
A ROW packet may contain commands other than ACT or
PRER. The REFA and REFP commands are equivalent to
ACT and PRER for interaction analysis purposes. The inter-
action rules of the NAPR, PDNR, and RLXR commands are
discussed in a later section.
Figure 9: COL-to-ROW Packet Interaction- Timing
CTM/CFM
DQA8..0
DQB8..0
COL4
..COL0
ROW2
..ROW0
T
0
T
4
T
8
T
12
T
1
T
5
T
9
T
13
T
2
T
6
T
10
T
14
T
3
T
7
T
11
T
15
T
16
T
T
17
T
18
T
19
Transaction a: COPa
Transaction b: ROPb
a1= {Da,Ba,Ca1}
b0= {Db,Bb,Rb}
t
CRDELAY
ROPb b0
COPa a1
Table 13: COL-to-ROW Packet Interaction - Rules
Case #
COPa
Da
Ba
Ca1
ROPb
Db
Bb
Rb
t
CRDELAY
Example
CR1
NOCOP
Da
Ba
Ca1
x..x
xxxxx
xxxx
x..x
0
CR2
RD/WR
Da
Ba
Ca1
x..x
/= Da
xxxx
x..x
0
CR3
RD/WR
Da
Ba
Ca1
x..x
== Da
/= {Ba,Ba+1,Ba-1}
x..x
0
CR4
RD/WR
Da
Ba
Ca1
ACT
== Da
== {Ba}
x..x
Illegal
CR5
RD/WR
Da
Ba
Ca1
ACT
== Da
== {Ba+1,Ba-1}
x..x
Illegal
CR6
RD
Da
Ba
Ca1
PRER
== Da
== {Ba,Ba+1,Ba-1}
x..x
t
RDP
Figure 15
CR7
retire
a
Da
Ba
Ca1
PRER
== Da
== {Ba,Ba+1,Ba-1}
x..x
t
RTP
Figure 16
CR8
WR
b
Da
Ba
Ca1
PRER
== Da
== {Ba,Ba+1,Ba-1}
x..x
0
Figure 19
CR9
xxxx
Da
Ba
Ca1
NOROP
xxxxx
xxxx
x..x
0
a. This is any command which permits the write buffer of device Da to retire (see Table 8).
“
Ba
”
is the bank address in the write buffer.
b. This situation is hazardous because the write buffer will be left unretired while the targeted bank is precharged. See Figure 19.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM418RD4AC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM |
| KM418RD4AD | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM |
| KM418RD4C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM |
| KM418RD4D | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM |
| KM418RD8AC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM |
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