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參數(shù)資料
| 型號： | ISP1582BS,557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC56 |
| 封裝： | 8 X 8 MM, 0.85 MM PITCH, PLASTIC, MO-220, SOT-684-1, HVQFN-56 |
| 文件頁數(shù)： | 3/69頁 |
| 文件大?。?/td> | 365K |
| 代理商： | ISP1582BS,557 |
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ISP1582_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 22 September 2008
10 of 68
NXP Semiconductors
ISP1582
Hi-Speed USB peripheral controller
Any A-device, including a PC or laptop, can respond to SRP. Any B-device, including a
standard USB peripheral, can initiate SRP.
The ISP1582 is a device that can initiate SRP.
7.6 NXP high-speed transceiver
7.6.1 NXP Parallel Interface Engine (PIE)
In the High-Speed (HS) transceiver, the NXP PIE interface uses a 16-bit parallel
bidirectional data interface. The functions of the HS module also include bit-stufng or
de-stufng and Non-Return-to-Zero Inverted (NRZI) encoding or decoding logic.
7.6.2 Peripheral circuit
To maintain a constant current driver for HS transmit circuits and to bias other analog
circuits, an internal band gap reference circuit and an RREF resistor form the reference
current. This circuit requires an external precision resistor (12.0 k
± 1 %) connected to
the analog ground.
7.6.3 HS detection
The ISP1582 handles more than one electrical state, Full-Speed (FS) or High-Speed
(HS), under the USB specication. When the USB cable is connected from the peripheral
to the host controller, the ISP1582 defaults to the FS state, until it sees a bus reset from
the host controller.
During the bus reset, the peripheral initiates an HS chirp to detect whether the host
controller supports Hi-Speed USB or Original USB. If the HS handshake shows that there
is an HS host connected, then the ISP1582 switches to the HS state.
In the HS state, the ISP1582 must observe the bus for periodic activity. If the bus remains
inactive for 3 ms, the peripheral switches to the FS state to check for a Single-Ended Zero
(SE0) condition on the USB bus. If an SE0 condition is detected for the designated time
(100
s to 875 s; refer to Ref. 1 “Universal Serial Bus Specication Rev. 2.0”,
Section 7.1.7.6), the ISP1582 switches to the HS chirp state to perform an HS detection
handshake. Otherwise, the ISP1582 remains in the FS state, adhering to the bus-suspend
specication.
7.6.4 Isolation
Ensure that the DP and DM lines are maintained in a clean state, without any residual
voltage or glitches. Once the ISP1582 is reset and the clock is available, ensure that there
are no erroneous pulses or glitches even of very small amplitude on the DP and DM lines.
Remark: If there are any erroneous unwanted pulses or glitches detected by the ISP1582
DP and DM lines, there is a possibility of the ISP1582 clocking this state into the internal
core, causing unknown behaviors.
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| ISP1761ET,518 | UNIVERSAL SERIAL BUS CONTROLLER, PBGA128 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1582BSGA | 功能描述:IC UBS CTRL HI-SPEED 56HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1582BS-S | 功能描述:USB 接口集成電路 HI-SPEED USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1582BS-T | 功能描述:USB 接口集成電路 USB PERIPH CNTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1582BSUM | 功能描述:IC USB PERIPH CONTROLLER 56HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1583 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed Universal Serial Bus peripheral controller |
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