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參數(shù)資料
| 型號： | ISP1561BM,557 |
| 廠商： | ST-ERICSSON |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP128 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-128 |
| 文件頁數(shù)： | 61/103頁 |
| 文件大?。?/td> | 457K |
| 代理商： | ISP1561BM,557 |
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ISP1561_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 5 March 2007
60 of 103
NXP Semiconductors
ISP1561
HS USB PCI Host Controller
8
PPS
On read Port Power Status: This bit reects the port power status,
regardless of the type of power switching implemented. This bit is cleared if
an overcurrent condition is detected. The HCD can set this bit by writing Set
Port Power or Set Global Power. The HCD can clear this bit by writing Clear
Port Power or Clear Global Power. Power Switching Mode and
PortPowerControlMask[NDP] determine which power control switches are
enabled. In Global Switching mode (Power Switching Mode = 0), only
Set/Clear Global Power controls this bit. In the per-port power switching
(Power Switching Mode = 1), if the PortPowerControlMask[NDP] bit for the
port is set, only Set/Clear Port Power commands are enabled. If the mask is
not set, only Set/Clear Global Power commands are enabled.
When port power is disabled, CCS (Current Connect Status), PES (Port
Enable Status), PSS (Port Suspend Status) and PRS (Port Reset Status)
must be reset.
0 — Port power is off
1 — Port power is on
On write Set Port Power: The HCD can write logic 1 to set the PPS (Port
Power Status) bit. Writing logic 0 has no effect.
Remark: This bit always reads logic1 if power switching is not supported.
7 to 5
-
reserved
4
PRS
On read Port Reset Status: When this bit is set by a write to Set Port Reset,
port reset signaling is asserted. When reset is completed and PRSC (Port
Reset Status Change) is set, this bit is cleared.
0 — Port reset signal is not active
1 — Port reset signal is active
On write Set Port Reset: The HCD can set the port reset signaling by writing
logic 1 to this bit. Writing logic 0 has no effect. If CCS is cleared, this write
does not set PRS (Port Reset Status) but instead sets CCS. This informs the
driver that it attempted to reset a disconnected port.
3
POCI
On read Port Overcurrent Indicator: This bit is valid only when the root hub
is congured to show overcurrent conditions are reported on a per-port basis.
If the per-port overcurrent reporting is not supported, this bit is set to logic 0.
If cleared, all power operations are normal for this port. If set, an overcurrent
condition exists on this port.
0 — No overcurrent condition
1 — Overcurrent condition detected
On write Clear Suspend Status: The HCD can write logic 1 to initiate a
resume. Writing logic 0 has no effect. A resume is initiated only if PSS (Port
Suspend Status) is set.
Table 86.
HCRhPortStatus[1:4] register: bit description …continued
Bit
Symbol Description
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1561BMGA | 功能描述:IC USB HOST CTRL HI-SPD 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1561BMGE | 功能描述:IC USB PCI HOST CTRLR 128-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1561BMUM | 功能描述:IC USB HOST CTRL HI-SPD 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1562 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller |
| ISP1562BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB PCI host controller |
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