參數(shù)資料
型號: ISP1501
英文描述: Hi-Speed Universal Serial Bus peripheral transceiver
中文描述: 高速通用串行總線外設(shè)收發(fā)器
文件頁數(shù): 9/40頁
文件大?。?/td> 770K
代理商: ISP1501
Philips Semiconductors
ISP1501
Hi-Speed USB peripheral transceiver
Product data
Rev. 02 — 21 November 2002
9 of 40
9397 750 10025
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
When TEST_J_K is set to logic 1, the sampled data from the differential amplifier will
not be NRZI decoded and bit de-stuffed. All serial HS USB signals are
passed-through and converted to 16-bit data on the parallel data bus. The handshake
signals (RX_BS_ERROR, RX_LAST_BYTE and RX_VALID) are invalid.
7.4 High-speed (HS) transceiver—periphery circuit
To maintain a constant current driver for high-speed (HS) transmit and biasing of
other analog circuits, an internal bandgap reference circuit and RREF resistor are
used to form the reference current. This circuit requires an external precision resistor
(12 k
±
1%) from pin RF to the analog ground. A pull-up resistor of 1.5 k
±
5%
must be connected between pin RPU and V
CCA3
. A 12 MHz crystal with an accuracy
of less than
±
500 ppm must be used between pins XTAL1 and XTAL2. Alternatively,
an input clock (3.3 V, 12 MHz clock
±
500 ppm, duty cycle between 40 and 60%) can
also be used to drive pin XTAL1 (pin XTAL2 is left open).
8.
Operating states
8.1 Interface and state selection
The MODE1 and MODE0 pins control the operating states of the ISP1501 and select
the appropriate function of multiplexed pins (see
Table 3
).
Table 3:
MODE[1:0]
Interface selection
State
0
State name
Disconnect
Pin
2
44
45
46
47
48
2
44
45
46
47
48
2
44
45
46
47
48
Function
OE
FSE0
VO
RCV
VM
VP
OE
FSE0
VO
RCV
VM
VP
TX_VALID
TX_BS_EN
TEST_J_K
RX_BS_ERROR
RX_INACTIVE
RX_VALID
00
01
1
Full-speed (FS)
10
2
High-speed (HS)
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