參數(shù)資料
型號: ISP1161A1BM,557
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù): 113/137頁
文件大?。?/td> 599K
代理商: ISP1161A1BM,557
Philips Semiconductors
ISP1161A1
USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
76 of 136
9397 750 13961
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
The HCD must set the byte count into the HcTransferCounter register and check the
HcBufferStatus register before reading from or writing to the buffer. The HCD must
write the command (41H to read, C1H to write) once only, and then read or write both
bytes of the data word. After every read/write, the pointer of ATL buffer RAM will be
automatically increased by two to point to the next data word until it reaches the value
of the HcTransferCounter register; otherwise, an internal EOT signal is not generated
to set the bit 2 (AllEOTInterrupt) of the Hc
PInterrupt register and update the
HcBufferStatus register.
The HCD must take care of the difference: the internal buffer RAM is organized in
bytes, so the HCD must write the byte count into the HcTransferCounter register, but
the HCD reads or writes the buffer RAM by 16 bits (by 1 data word).
Bit
7
6
5
4
3
2
1
0
Symbol
DataWord[7:0]
Reset
00H
Access
R/W
Table 65:
HcATLBufferPort register: bit description
Bit
Symbol
Description
15 to 0
DataWord[15:0]
read/write ATL buffer RAM’s two data bytes.
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