參數(shù)資料
型號(hào): IS82C600
廠商: Integrated Silicon Solution, Inc.
英文描述: 64K x 16 High-Speed SRAM with Address Decoding and Ready Logic(帶地址譯碼器和預(yù)備邏輯的高速靜態(tài)RAM)
中文描述: 64K的× 16高速的地址譯碼和就緒邏輯(帶地址譯碼器和預(yù)備邏輯的高速靜態(tài)RAM的靜態(tài)存儲(chǔ)器)
文件頁(yè)數(shù): 20/21頁(yè)
文件大?。?/td> 129K
代理商: IS82C600
20
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY
TB001-0B
01/20/99
IS82C600
ISSI
WRITE CYCLE 1: Primary Bus Internal SRAM WRITE Cycle Timing (TI TMS320LC5x/C5x DSP)
WRITE CYCLE 2: Primary Bus Internal SRAM WRITE Cycle Timing (TI TMS320LC54x/C54x DSP)
Ap[15:0]
WEp
Dp[15:0]
DATA VALID
ADDRESS VALID
T7
T8
T9
CLKOUT
(from DSP)
Ap[15:0]
MSTRBp
R/Wp
Dp[15:0]
ADDRESS VALID
T10
T11
DATA VALID
Note:
1. All timings are at zero wait state. However, external Writes require two cycles to prevent external bus conflicts.
(Refer to the TI TMS320LC54x/C54x Databook.)
Note:
1. All timings are at zero wait state. However, external Writes require two cycles to prevent external bus conflicts.
(Refer to the TI TMS320LC54x/C54x Databook.)
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