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參數(shù)資料
| 型號： | IS82C600 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 64K x 16 High-Speed SRAM with Address Decoding and Ready Logic(帶地址譯碼器和預備邏輯的高速靜態(tài)RAM) |
| 中文描述： | 64K的× 16高速的地址譯碼和就緒邏輯（帶地址譯碼器和預備邏輯的高速靜態(tài)RAM的靜態(tài)存儲器） |
| 文件頁數(shù)： | 13/21頁 |
| 文件大?。?/td> | 129K |
| 代理商： | IS82C600 |
IS82C600
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY
TB001-0B
01/20/99
13
ISSI
PS
0
0
DS
0
0
IS
0
1
Space for which
CSMEMs0
will not respond to any space, i.e., disabled.
CSMEMs0
will be asserted for I/O space (when
IS
asserted) as determined by the
starting address and size bits.
CSMEMs0
will be asserted for DATA space (when
DS
asserted) as determined by
the starting address and size bits.
CSMEMs0
will be asserted for I/O or DATA space (when
IS
or
DS
asserted) as
determined by the starting address and size bits.
CSMEMs0
will be asserted for PROGRAM space (when
PS
asserted) as determined
by the starting address and size bits.
CSMEMs0
will be asserted for PROGRAM or I/O space (when
PS
or
IS
asserted) as
determined by the starting address and size bits.
CSMEMs0
will be asserted for PROGRAM or DATA space (when
PS
or
DS
asserted)
as determined by the starting address and size bits.
CSMEMs0
will be asserted for any space as determined by the starting address and
size bits.
CSMEMs0
will be active
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Size for which
address. The sizes are in the increments of 8K Words.
CSMEMs0
will be asserted for starting address to starting address + 8K
CSMEMs0
will be asserted for starting address to starting address + 16K
CSMEMs0
will be asserted for starting address to starting address + 32K
CSMEMs0
will be asserted for starting address to starting address + 64K
CSMEMs0
will be asserted for starting address to starting address + 128K
CSMEMs0
will be asserted for starting address to starting address + 256K
CSMEMs0
will be asserted for starting address to starting address + 512K
CSMEMs0
will be asserted for starting address to starting address + 1024K
CSMEMs0
will be active starting from the programmed starting
SZ2
0
0
0
0
1
1
1
1
SZ1
0
0
1
1
0
0
1
1
SZ0
0
1
0
1
0
1
0
1
Register 2
CSMEMs1
Pin Select Register (default 0048):
This register is used to select the decoding for
CSMEM
s1.
The decoding is on an 8K boundary and can be programmed
to respond to
PS
,
DS
, or
IS
address space or a combination
thereof. The
CSMEM
s0 can be used as chip select pin for
external memory or I/O device. The bit descriptions and
programmability are identical to Register 1, except that the
default is 0048. Refer to
CSMEM
s0 bit descriptions.
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
RSVD
A21
A20
A19
A18
A17
A16
A15
A14
A13
PS
DS
IS
SZ2
SZ1
SZ0
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IS82C82 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Harris Corporation 功能描述: |
| IS82C83H | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Octal Latching Inverting Bus Driver |
| IS82C84A | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| IS82C85 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| IS82C86H | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Octal Bus Transceiver |
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