參數(shù)資料
型號： INTEL740
英文描述： 64-Bit Graphics (GUI) Accelerator
中文描述： 64位圖形（GUI）的加速器
文件頁數(shù)： 4/41頁
文件大?。?/td> 435K
代理商： INTEL740
CONTENTS
PAGE
FIGURES
(Continued)
Figure 3.2
Figure 3.3
Asynchronous Operation
ààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 20
Intel386
TM
DX Microprocessor and Intel387
TM
DX MCP Coprocessor System
Configuration
àààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 23
Bus State Diagram
ààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 25
Nonpipelined Read and Write Cycles
ààààààààààààààààààààààààààààààààààààààààààààà 27
Fastest Transitions to and from Pipelined Cycles
ààààààààààààààààààààààààààààààààà 28
Pipelined Cycles with Wait States
àààààààààààààààààààààààààààààààààààààààààààààààà 29
STEN, BUSY
Y
and PEREQ Timing Relationship
ààààààààààààààààààààààààààààààààà 29
Figure 4.0a Typical Output Valid Delay vs Load Capacitance at Max Operating
Temperature
àààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 32
Figure 4.0b Typical Output Rise Time vs Load Capacitance at Max Operating
Temperature
àààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 32
Figure 4.1
CPUCLK2/NUMCLK2 Waveform and Measurement Points for Input/Output A.C.
Specifications
ààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 33
Figure 4.2
Output Signals
ààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 33
Figure 4.3
Input and I/O Signals
àààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 34
Figure 4.4
RESET Signal
ààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 34
Figure 4.5
Float from STEN
ààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 34
Figure 4.6
Other Parameters
àààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 35
Figure 3.4
Figure 3.5
Figure 3.6
Figure 3.7
Figure 3.8
TABLES
Table 2.1
Table 2.2
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.7
Table 3.1
Table 3.2
Table 3.3
Table 3.4
Table 4.1
Table 4.2a Combinations of Bus Interface and Execution Speeds
ààààààààààààààààààààààààààààà 31
Table 4.2b Timing Requirements of the Execution Unit
ààààààààààààààààààààààààààààààààààààààà 31
Table 4.2c Timing Requirements of the Bus Interface Unit
àààààààààààààààààààààààààààààààààààà 31
Table 4.3
Other Parameters
àààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 35
Intel387
TM
DX MCP Data Type Representation in Memory
àààààààààààààààààààààààààà 7
Condition Code Interpretation
ààààààààààààààààààààààààààààààààààààààààààààààààààààà 10
Condition Code Interpretation after FPREM and FPREM1 Instructions
ààààààààààààà 11
Condition Code Resulting from Comparison
ààààààààààààààààààààààààààààààààààààààà 11
Condition Code Defining Operand Class
àààààààààààààààààààààààààààààààààààààààààà 11
Intel386
TM
DX Microprocessor Interrupt Vectors Reserved for MCP
ààààààààààààààà 15
Exceptions
ààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 16
Intel387
TM
DX MCP Pin Summary
ààààààààààààààààààààààààààààààààààààààààààààààààà 18
Intel387
TM
DX MCP Pin Cross-Reference
ààààààààààààààààààààààààààààààààààààààààà 18
Output Pin Status after Reset
ààààààààààààààààààààààààààààààààààààààààààààààààààààà 21
Bus Cycles Definition
ààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 24
DC Specifications
àààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà 30
4
4
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