參數(shù)資料
型號(hào): IDTTSE2002B3CNRG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 24/30頁
文件大小: 423K
描述: IC TEMP SENS EEPROM DFN-8
標(biāo)準(zhǔn)包裝: 120
功能: 溫度監(jiān)控系統(tǒng)(傳感器)
傳感器類型: 內(nèi)部
感應(yīng)溫度: -20°C ~ 125°C
精確度: ±1°C(最小值)
拓?fù)洌?/td> ADC(三角積分型),控制邏輯,寄存器庫
輸出類型: 2 線串行,I²C?/SMBUS?
輸出警報(bào):
輸出風(fēng)扇:
電源電壓: 3 V ~ 3.6 V
工作溫度: -20°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-VFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 8-VFQFPN(2x3)
包裝: 管件
24 of 30
May 12, 2010
 
IDT Confidential
TRES Bit Decode
Note: Refer to section Resolution Register on page 28.
Bit 2 - RANGE; Indicates the supported temperature range.
'0' - The temperature monitor clamps values lower than 0 癈.
'1' (default) - The temperature monitor can read temperatures below 0 癈 and sets the sign bit appropriately.
Bit 1 - ACC; Indicates the supported temperature accuracy.
'0' - The temperature monitor has ? 癈 accuracy of the active range (75 癈 to 95 癈) and 3 癈 accuracy over the entire operating range.
'1' (default) - Bgrade. The temperature monitor has ? 癈 accuracy over the active range (75 癈 to 95 癈) and 2癈 accuracy over
the monitoring range (40 癈 to 125 癈)
Bit 0 - EVENT
; Indicates whether the temperature monitor supports interrupt capabilities
'0'.-The device does not support interrupt capabilities.
'1' (default); The device supports interrupt capabilities.
Configuration Register
Configuration Register
The Configuration Register holds the control and status bits of the EVENT pin as well as general hysteresis on all limits.
Bits 15 - 11  RFU; Reserved for future use. These bits will always read '0' and writing to them will have no affect. For future compatibility, all RFU
bits must be programmed as '0'.
Bits 10 - 9  HYST[1:0]; Control the hysteresis that is applied to all limits as shown in the HYST Bit Decode table that follows. This hysteresis
applies to all limits when the temperature is dropping below the threshold so that once the temperature is above a given threshold, it must drop below
the threshold minus the hysteresis in order to be flagged as an interrupt event. Note that hysteresis is also applied to EVENT
 pin functionality. When
either of the lock bits is set, these bits cannot be altered.
TRES[1:0]
Temperature Resolution
1
0
0
0
0.5癈 (9-bit)
0
1
0.25癈 (10-bit) (default)
1
0
0.125癈 (11-bit)
1
1
0.0625癈 (12-bit)
ADDR   R/W   B15/B7    B14/B6    B13/B5   B12/B4    B11/B3
B10/B2
B9/B1
B8/B0
Default
01
R/W
RFU
RFU
RFU
RFU
RFU
HYST[1:0]
SHDN
0000
TCRIT_
LOCK
EVENT_
LOCK
CLEAR   EVENT_
STS
EVENT_
CTRL
TCRIT_
ONLY
EVENT_
POL
EVENT_
MODE
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