參數(shù)資料
型號(hào): IDTTSE2002B3CNRG
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 11/30頁(yè)
文件大?。?/td> 423K
描述: IC TEMP SENS EEPROM DFN-8
標(biāo)準(zhǔn)包裝: 120
功能: 溫度監(jiān)控系統(tǒng)(傳感器)
傳感器類型: 內(nèi)部
感應(yīng)溫度: -20°C ~ 125°C
精確度: ±1°C(最小值)
拓?fù)洌?/td> ADC(三角積分型),控制邏輯,寄存器庫(kù)
輸出類型: 2 線串行,I²C?/SMBUS?
輸出警報(bào): 無(wú)
輸出風(fēng)扇: 無(wú)
電源電壓: 3 V ~ 3.6 V
工作溫度: -20°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-VFDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 8-VFQFPN(2x3)
包裝: 管件
11 of 30
May 12, 2010
 
IDT Confidential
Device Diagram
Device Interface
The TSE2002B3C behaves as a slave device in the I
2
C protocol, with all memory operations synchronized by the serial clock. Read and Write
operations are initiated by a START condition, generated by the bus master. The START condition is followed by a Device Select Code and R/W# bit
(as described in the I
2
C Operating Mode table), terminated by an acknowledge bit. The TSE2002B3C does not initiate clock stretching which is an
optional I
2
C bus feature.
In accordance with the I
2
C bus definition, the device uses three (3) built-in, 4-bit Device Type Identifier Codes (DTIC) and the state of SA0, SA1,
and SA2 to generate an I
2
C Slave Address. The SPD memory may be accessed using a DTIC of (1010), and to perform the PSWP,CSWP, or PSWP
operations a DTIC of (0110) is required. The TS registers are accessed using a DTIC of (0011).
When writing data to the memory, the SPD inserts an acknowledge bit during the 9th bit time, following the bus master's 8-bit transmission. When
data is read by the bus master, the bus master acknowledges the receipt of the data byte in the same way. Data transfers are terminated by a Bus
Master generated STOP condition after an Ack for WRITE, and after a NoAck for READ.
The TS section of the device uses a pointer register to access all registers in the device.
Additionally, all data transfers to and from this section of the device are performed as block read/ write operations. The data is transmitted/received
as 2 bytes, Most Significant Byte (MSB) first, and terminated with a NoAck and STOP after the Least Significant byte (LSB). Data and address infor-
mation is transmitted and received starting with the Most Significant Bit.first
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