參數(shù)資料
型號(hào)： IDT82V2051EPP
廠商： IDT, Integrated Device Technology Inc
文件頁(yè)數(shù)： 9/61頁(yè)
文件大?。?/td> 0K
描述： IC LIU E1 SGL SHORT HAUL 44-TQFP
標(biāo)準(zhǔn)包裝： 80
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 44-LQFP
供應(yīng)商設(shè)備封裝： 44-TQFP（10x10）
包裝： 托盤
其它名稱： 82V2051EPP
IDT82V2051E
SINGLE CHANNEL E1 SHORT HAUL LINE INTERFACE UNIT
Functional Description
17
December 9, 2005
3.2.4
TRANSMIT PATH LINE INTERFACE
The transmit line interface consists of TTIP pin and TRING pin. The
impedance matching can be realized by the internal impedance matching
circuit or the external impedance matching circuit. If T_TERM[2] is set to
‘0’, the internal impedance matching circuit will be selected. In this case,
the T_TERM[1:0] bits (TERM, 03H) can be set to choose 75
or 120
internal impedance of TTIP/TRING. If T_TERM[2] is set to ‘1’, the internal
impedance matching circuit will be disabled. In this case, the external
impedancematchingcircuitwillbeusedtorealizetheimpedancematching.
Figure-6 shows the appropriate external components to connect with the
cable. Table-4 is the list of the recommended impedance matching for
transmitter.
In hardware control mode, TERM pin can be used to select impedance
matching for both receiver and transmitter. If TERM pin is low, external
impedance network will be used for impedance matching. If TERM pin is
high, internal impedance will be used for impedance matching and PULS
pin will be set to select the specific internal impedance. Refer to 5 Hardware
TheTTIP/TRINGpinscan also beturned intohigh impedanceby setting
the THZ bit (TCF1, 06H) to ‘1’. In this state, the internal transmit circuits are
still active.
In hardware control mode, TTIP/TRING can be turned into high imped-
ance by pulling THZ pin to high. Refer to 5 Hardware Control Pin Summary
for details.
Besides, in the following cases, both TTIP/TRING pins will also become
high impedance:
Loss of MCLK;
Loss of TCLK (exceptions: Remote Loopback; Transmit internal
pattern by MCLK);
Transmit path power down;
After software reset; pin reset and power on.
Note: The precision of the resistors should be better than ± 1%
3.2.5
TRANSMIT PATH POWER DOWN
ThetransmitpathcanbepowereddownbysettingtheT_OFFbit(TCF0,
05H) to ‘1’. In this case, the TTIP/TRING pins are turned into high imped-
ance.
In hardware control mode, the transmit path can be powered down by
pulling both PATT1 and PATT0 pins to high. Refer to 5 Hardware Control
Pin Summary for details.
Table-4 Impedance Matching for Transmitter
Cable Configuration
Internal Termination
External Termination
T_TERM[2:0]
PULS[3:0]
RT
T_TERM[2:0]
PULS[3:0]
RT
E1 / 75
000
0000
0
1XX
0001
9.4
E1 / 120
001
0001
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IDT82V2052E 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:DUAL CHANNEL E1 SHORT HAUL LINE INTERFACE UNIT
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