參數(shù)資料
型號(hào)： IDT82P2828BHG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 77/154頁
文件大?。?/td> 0K
描述： IC LIU T1/J1/E1 28+1CH 640-PBGA
標(biāo)準(zhǔn)包裝： 5
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 640-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 640-PBGA-EP（31x31）
包裝： 托盤
其它名稱： 82P2828BHG
IDT82P2828
28(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Functional Description
29
February 6, 2009
3
FUNCTIONAL DESCRIPTION
3.1
T1 / E1 / J1 MODE SELECTION
The IDT82P2828 can be configured to T1/J1 mode or E1 mode
globally or on a per-channel basis. The configuration is determined by
the TEHWE pin, the TEHW pin and the T1E1 bit (b0, CHCF,...). Refer to
Table-1 for details of the operation mode selection.
3.2
RECEIVE PATH
3.2.1
RX TERMINATION
The receive line interface supports Receive Differential mode and
Receive Single Ended mode, as selected by the R_SING bit (b3,
RCF0,...). In Receive Differential mode, both RTIPn and RRINGn are
used to receive signal from the line side. In Receive Single Ended mode,
only RTIPn is used to receive signal.
In Receive Differential mode, the line interface can be connected
with T1 100
, J1 110 or E1 120 twisted pair cable or E1 75
coaxial cable. In Receiver Single Ended mode, the line interface can
only be connected with 75
coaxial cable.
The receive impedance matching is realized by using internal imped-
ance matching or external impedance matching for each channel in
different applications.
3.2.1.1 Receive Differential Mode
In Receive Differential mode, three kinds of impedance matching are
supported: Fully Internal Impedance Matching, Partially Internal Imped-
ance Matching and External Impedance Matching. Figure-7 shows an
overview of how these Impedance Matching modes are switched.
Fully Internal Impedance Matching circuit uses an internal program-
mable resistor (IM) only and does not use an external resistor. This
configuration saves external components and supports 1:1 Hitless
Protection Switching (HPS) applications without relays. Refer to
Partially Internal Impedance Matching circuit consists of an internal
programmable resistor (IM) and a value-fixed 120
external resistor
(Rr). Compared with Fully Internal Impedance Matching, this configura-
tion provides considerable savings in power dissipation of the device.
For example, In E1 120
PRBS mode, the power savings would be
0.75 W. For power savings in other modes, please refer to Chapter 8
External Impedance Matching circuit uses an external resistor (Rr)
only.
Figure-7 Switch between Impedance Matching Modes
To support some particular applications, such as hot-swap or Hitless
Protection Switch (HPS) hot-switchover, RTIPn/RRINGn must be forced
to enter high impedance state (i.e., External Impedance Matching). For
hot-swap, RTIPn/RRINGn must be always held in high impedance state
during /after power up; for HPS hot-switchover, RTIPn/RRINGn must
enter high impedance state immediately after switchover. Though each
channel can be individually configured to External Impedance Matching
through register access, it is too slow for hitless switch. Therefore, a
hardware pin - RIM - is provided to globally control the high impedance
for all 29 receivers.
Table-1 Operation Mode Selection
Global Programming
Per-Channel Programming
TEHWE Pin
Open
Low
TEHW Pin
Open
Low
(The configuration of this pin is ignored)
T1E1 Bit
(The configuration of this bit is ignored).
0
1
Operation Mode
T1/J1
E1
T1/J1
E1
IM
RTIP
RRING
RIN
R_TERM2
1 0
0 1
Receive
path
R_TERM[1:0]
RIM
R120IN
Rr = 120
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