參數(shù)資料
型號(hào)： IDT82P2828BHG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 25/154頁
文件大?。?/td> 0K
描述： IC LIU T1/J1/E1 28+1CH 640-PBGA
標(biāo)準(zhǔn)包裝： 5
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 640-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 640-PBGA-EP（31x31）
包裝： 托盤
其它名稱： 82P2828BHG
IDT82P2828
28(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Programming Information
120
February 6, 2009
JIT_NL - Negative Peak Jitter Measurement Low-Byte Register
JIT_NH - Negative Peak Jitter Measurement High-Byte Register
Address: 7E8H
Type: Read
Default Value: 00H
Bit
Name
Description
7 - 0
JIT_N[7:0]
These bits, together with the JIT_N[11:8] bits, reflect the greatest negative peak value of the demodulated jitter signal which is
measured by channel 0. They are updated automatically or manually, as determined by the JM_MD bit (b1, JM). They should be
read in the next round of jitter measurement; otherwise, they will be overwritten.
The relationship between the greatest negative peak value and the indication in these bits is:
Negative Peak = [JIT_NH, JIT_NL] / 16 (UIpp)
Address: 7E9H
Type: Read
Default Value: 00H
Bit
Name
Description
7 - 4
-
Reserved.
3 - 0
JIT_N[11:8]
(Refer to the description of the JIT_NL register.)
76
54
3
2
1
0
JIT_N7
JIT_N6
JIT_N5
JIT_N4
JIT_N3
JIT_N2
JIT_N1
JIT_N0
76
54
3
2
1
0
-
JIT_N11
JIT_N10
JIT_N9
JIT_N8
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