- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9969 > IDT82P2288BBG8 (IDT, Integrated Device Technology Inc)TXRX T1/J1/E1 8CHAN 256-PBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | IDT82P2288BBG8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 296/362頁(yè) |
| 文件大小： | 0K |
| 描述： | TXRX T1/J1/E1 8CHAN 256-PBGA |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 收發(fā)器 |
| 規(guī)程： | IEEE 1149.1 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-BBGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（17x17） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 82P2288BBG8 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)第229頁(yè)第230頁(yè)第231頁(yè)第232頁(yè)第233頁(yè)第234頁(yè)第235頁(yè)第236頁(yè)第237頁(yè)第238頁(yè)第239頁(yè)第240頁(yè)第241頁(yè)第242頁(yè)第243頁(yè)第244頁(yè)第245頁(yè)第246頁(yè)第247頁(yè)第248頁(yè)第249頁(yè)第250頁(yè)第251頁(yè)第252頁(yè)第253頁(yè)第254頁(yè)第255頁(yè)第256頁(yè)第257頁(yè)第258頁(yè)第259頁(yè)第260頁(yè)第261頁(yè)第262頁(yè)第263頁(yè)第264頁(yè)第265頁(yè)第266頁(yè)第267頁(yè)第268頁(yè)第269頁(yè)第270頁(yè)第271頁(yè)第272頁(yè)第273頁(yè)第274頁(yè)第275頁(yè)第276頁(yè)第277頁(yè)第278頁(yè)第279頁(yè)第280頁(yè)第281頁(yè)第282頁(yè)第283頁(yè)第284頁(yè)第285頁(yè)第286頁(yè)第287頁(yè)第288頁(yè)第289頁(yè)第290頁(yè)第291頁(yè)第292頁(yè)第293頁(yè)第294頁(yè)第295頁(yè)當(dāng)前第296頁(yè)第297頁(yè)第298頁(yè)第299頁(yè)第300頁(yè)第301頁(yè)第302頁(yè)第303頁(yè)第304頁(yè)第305頁(yè)第306頁(yè)第307頁(yè)第308頁(yè)第309頁(yè)第310頁(yè)第311頁(yè)第312頁(yè)第313頁(yè)第314頁(yè)第315頁(yè)第316頁(yè)第317頁(yè)第318頁(yè)第319頁(yè)第320頁(yè)第321頁(yè)第322頁(yè)第323頁(yè)第324頁(yè)第325頁(yè)第326頁(yè)第327頁(yè)第328頁(yè)第329頁(yè)第330頁(yè)第331頁(yè)第332頁(yè)第333頁(yè)第334頁(yè)第335頁(yè)第336頁(yè)第337頁(yè)第338頁(yè)第339頁(yè)第340頁(yè)第341頁(yè)第342頁(yè)第343頁(yè)第344頁(yè)第345頁(yè)第346頁(yè)第347頁(yè)第348頁(yè)第349頁(yè)第350頁(yè)第351頁(yè)第352頁(yè)第353頁(yè)第354頁(yè)第355頁(yè)第356頁(yè)第357頁(yè)第358頁(yè)第359頁(yè)第360頁(yè)第361頁(yè)第362頁(yè)
IDT82P2288
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Functional Description
39
March 04, 2009
event. This error event is captured by the FERI bit and is for-
warded to the Performance Monitor.
DDS Pattern Error: The received 6-bit DDS in each CH24 is com-
pared with the DDS pattern - ‘0XX11101’ (MSB left and ‘X’ is not
cared). When one or more bits do not match the DDS pattern, a
single DDS pattern error event is generated. This error event is for-
warded to the Performance Monitor.
The 6-bit DDS pattern and its following F-bit make up a 7-bit pattern.
When one or more bits do not match its pattern (refer to Table 14), a
single error is generated. When this error number exceeds the ratio set
in the M2O[1:0] bits, it is out of synchronization. Then if the REFEN bit is
‘1’, the Frame Processor will start to search for synchronization again. If
the REFEN bit is ‘0’, no error can lead to reframe except for manually
setting. The manual reframe is executed by a transition from ‘0’ to ‘1’ on
the REFR bit. During out of synchronization state, the error event detec-
tion is suspended.
Once resynchronized, if the new-found F bit position differs from the
previous one, the change of frame alignment event is generated. This
event is captured by the COFAI bit and is forwarded to the Performance
Monitor.
Switch Line Carrier - 96 (SLC-96) Format (T1 only)
In SLC-96 format, only one kind of error is detected:
F Bit Error: The Ft bit in each odd frame and the Fs bit in Frame
(2n) (0<n<12 and n=36) is compared with the expected one (refer
to Table 15). Each unmatched bit leads to a F-bit error event. This
error event is captured by the FERI bit and is forwarded to the Per-
formance Monitor.
Each unmatched Ft bit in the odd frame and each unmatched Fs bit
in Frame (2n) (0<n<12 and n=36) are also counted separately. When the
number of either of them exceeds the ratio set in the M2O[1:0] bits, it is
out of synchronization. Then if the REFEN bit is ‘1’, the Frame
Processor will start to search for synchronization again. If the REFEN bit
is ‘0’, no error can lead to reframe except for manually setting. The
manual reframe is executed by a transition from ‘0’ to ‘1’ on the REFR
bit. During out of synchronization state, the error event detection is
suspended.
Once resynchronized, if the new-found F bit position differs from the
previous one, the change of frame alignment event is generated. This
event is captured by the COFAI bit and is forwarded to the Performance
Monitor.
3.8.1.3 Overhead Extraction (T1 Mode SLC-96 Format Only)
In SLC-96 format, the Concentrator bits, Maintenance bits, Alarm bits
and Switch bits are all extracted to the RDL0, RDL1 & RDL2 registers
respectively.
All these extractions will be set to de-bounce if the SCDEB bit is set
to ‘1’. Thus, the value in the RDL0, RDL1 & RDL2 registers are updated
if the received corresponding code is the same for 2 consecutive SLC-
96 frames. Whether de-bounced or not, a change indication will be set in
the SCCI bit, SCMI bit, SCAI bit and SCSI bit respectively if the corre-
sponding codes in the RDL0, RDL1 & RDL2 registers differ from the
previous ones.
The value in the RDL0, RDL1 & RDL2 registers is held during out of
SLC-96 synchronization state.
3.8.1.4 Interrupt Summary
The interrupt sources in this block are summarized in Table 16.
When there are conditions meeting the interrupt sources, the corre-
sponding Status bit will be asserted high. When there is a transition
(from ‘1’ to ‘0’ or from ‘0’ to ‘1’) on the Status bit, the corresponding
Status Interrupt Indication bit will be set to ‘1’ (If the Status bit does not
exist, the source will cause its Status Interrupt Indication bit to ‘1’
directly) and the Status Interrupt Indication bit will be cleared by writing
‘1’. A ‘1’ in the Status Interrupt Indication bit indicates an interrupt
occurred. The interrupt is reported by the INT pin if its Status Interrupt
Enable bit was set to ‘1’.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V48B15M250BF2 | CONVERTER MOD DC/DC 15V 250W |
| IDT72615L50PF | IC FIFO BY SYNC 512X18X2 64QFP |
| IDT82P2288BB8 | TXRX T1/J1/E1 8CHAN 256-PBGA |
| V48B15M250BF | CONVERTER MOD DC/DC 15V 250W |
| IDT723643L15PF | IC FIFO SYNC 1024X36 128QFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT82P2521 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:21(1) Channel High-Density E1 Line Interface Unit |
| IDT82P2521BH | 功能描述:IC LIU E1 21+1CH SHORT 640-PBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| IDT82P2521BHBLANK | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:21(1) Channel High-Density E1 Line Interface Unit |
| IDT82P2521BHG | 功能描述:IC LIU E1 21+1CH SHORT 640-PBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| IDT82P2521BHGBLANK | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:21(1) Channel High-Density E1 Line Interface Unit |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。