參數(shù)資料
型號(hào): ICSS98UAE877AHLFIT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 98UAE SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
封裝: LEAD FREE, MO-205/MO-255, VFBGA-52
文件頁數(shù): 4/18頁
文件大?。?/td> 331K
代理商: ICSS98UAE877AHLFIT
ICS98UAE877A
1.5V LOW-POWER WIDE-RANGE FREQUENCY CLOCK DRIVER
COMMERCIAL TEMPERATURE GRADE
1.5V LOW-POWER WIDE-RANGE FREQUENCY CLOCK DRIVER
12
ICS98UAE877A
7181/2
Figure 7: Half-Period Jitter
Yx, FB_OUTC
Yx, FB_OUTT
tJIT(HPER_n)
1
fo
tJIT(HPER_n+1)
tJIT(HPER) =tJIT(HPER_n) -
1
2xfo
Clock Inputs
and outputs
20%
80%
tSLR
20%
80%
tSLF
VID VOD
Figure 8: Input and Output Slew Rates
相關(guān)PDF資料
PDF描述
ICSS98UAE877AKLFT 98UAE SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40
ICSSSTU3286AHLFT SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96
ICSSSTUA32864BHMLFT SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96
ICSSSTUA32866BHLFT SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96
ICSSSTUA32866BHLFT SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICSSSTU32864 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer
ICSSSTUA32S869B 制造商:ICS 制造商全稱:ICS 功能描述:14-Bit Configurable Registered Buffer for DDR2
ICSSSTUAF32865A 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
ICSSSTUAF32865AHLFT 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
ICSSSTUAF32866B 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2