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參數(shù)資料
| 型號： | IBM13M8734HCC |
| 廠商： | IBM Microeletronics |
| 英文描述： | 8M x 72 1 Bank Registered/Buffered SDRAM Module(8M x 72 1組寄存/緩沖同步動態(tài)RAM模塊) |
| 中文描述： | 8米× 72 1銀行注冊/緩沖內(nèi)存模組（8米× 72 1組寄存/緩沖同步動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 13/21頁 |
| 文件大?。?/td> | 543K |
| 代理商： | IBM13M8734HCC |
IBM13M8734HCC
8M x 72 1 Bank Registered/Buffered SDRAM Module
19L7145.E93758B
2/99
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 13 of 21
Operating, Standby, and Refresh Currents
(T
A
= 0 to +70C, V
DD
= 3.3V
±
0.3V)
Parameter
Symbol
Test Condition
Speed
Units
Notes
-260
-360
-10
Operating Current
1 bank operation
I
CC1
t
RC
=
t
RC
(min), t
CK
= min
Active-Precharge command
cycling without burst operation
857
857
613
mA
1
Precharge Standby Current in
Power Down Mode
I
CC2P
CKE0
≤
V
IL
(max), t
CK
= min,
CS =V
IH
(min)
191
191
127
mA
1
I
CC2PS
CKE0
≤
V
IL
(max), t
CK
= Infinity,
S0, S2 =V
IH
(min)
34
34
34
mA
Precharge Standby Current in
Non-Power Down Mode
I
CC2
CKE0
≥
V
IH
(min), t
CK
= min,
S0, S2 =V
IH
(min)
497
497
343
mA
1
I
CC2S
CKE0
≥
V
IH
(min), t
CK
= Infinity,
S0, S2 =V
IH
(min)
70
70
70
mA
No Operating Current
(Active state: 4bank)
I
CC3
CKE0
≥
V
IH
(min), t
CK
= min,
S0, S2 =V
IH
(min)
542
542
388
mA
1
I
CC3P
CKE0
≤
V
IL
(max), t
CK
= min,
S0, S2 =V
IH
(min)
(Power Down Mode)
245
245
181
mA
1
Burst Operating Current
(Active state: 4bank)
I
CC4
t
CK
= min,
Read command cycling
1262
1262
928
mA
1, 2
Auto (CBR) Refresh Current
I
CC5
t
CK
= min,
CBR command cycling
1487
1487
1108
mA
1
Self Refresh Current
I
CC6
CKE0
≤
0.2V
34
34
34
mA
1. These parameters depend on the cycle rate and are measured with the cycle determined by the minimum value of t
CK
and t
RC
.
Input signals are changed once during t
CK
(min). t
CK
(min) = 10ns (for -260 and -360) and 15ns (for -10).
2. The specified values are obtained with the DIMM data outputs open.
Discontinued (8/99 - last order; 12/99 - last ship)
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