參數(shù)資料
型號(hào)： IBM13M32734CCB
廠商： IBM Microeletronics
英文描述： 32M x 72 1-Bank Registered / Buffered SDRAM Module(32M x 72 1組寄存/緩沖同步動(dòng)態(tài)RAM模塊)
中文描述： 32M × 72配置1，銀行注冊(cè)/緩沖內(nèi)存模組（32M × 72配置1組寄存/緩沖同步動(dòng)態(tài)內(nèi)存模塊）
文件頁(yè)數(shù)： 6/20頁(yè)
文件大小： 364K
代理商： IBM13M32734CCB
IBM13M32734CCB
32M x 72 1-Bank Registered / Buffered SDRAM Module
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 6 of 20
06K7740.H03381
04/00
Serial Presence Detect
(Part 1 of 2)
Byte #
Description
SPD Entry Value
Serial PD
Data Entry
(Hexadecimal)
Notes
0
Number of Serial PD Bytes Written during Produc-
tion
Total Number of Bytes in Serial PD device
Fundamental Memory Type
Number of Row Addresses on Assembly
Number of Column Addresses on Assembly
Number of DIMM Banks
Data Width of Assembly
Assembly Voltage Interface Levels
SDRAM Device Cycle Time (CL = 3)
SDRAM Device Access Time from Clock at CL=3
DIMM Configuration Type
Assembly Refresh Rate/Type
SDRAM Device Width
Error Checking SDRAM Device Width
SDRAM Device Attr: Min Clk Delay, Random Col
Access
SDRAM Device Attributes: Burst Lengths Sup-
ported
SDRAM Device Attributes: Number of Device
Banks
SDRAM Device Attributes: CAS Latency
SDRAM Device Attributes: CS Latency
SDRAM Device Attributes: WE Latency
SDRAM Module Attributes
128
80
1
2
3
4
5
256
08
04
0C
0B
01
4800
01
75
54
02
80
04
04
SDRAM
12
11
1
x72
LVTTL
7.5ns
5.4ns
ECC
6 - 7
8
9
10
11
12
13
14
1, 2
SR/1X(15.625
μ
s)
x4
x4
15
1 Clock
01
16
1, 2, 4, 8,Full Page
8F
17
4
04
18
19
20
21
2, 3
0
0
06
01
01
IF
Registered/Buffered with PLL
Write-1/Read Burst, Precharge
All, Auto-Precharge
15.0ns
22
SDRAM Device Attributes: General
0E
23
Minimum Clock Cycle at CLX-1 (CL = 2)
Maximum Data Access Time (t
AC
) from Clock at
CLX-1 (CL = 2)
Minimum Clock Cycle Time at CLX-2 (CL = 1)
Maximum Data Access Time (t
AC
) from Clock at
CLX-2 (CL = 1)
Minimum Row Precharge Time (t
RP
)
Minimum Row Active to Row Active delay (t
RRD
)
Minimum RAS to CAS delay (t
RCD
)
Minimum RAS Pulse width (t
RAS
)
Module Bank Density
F0
1, 2
24
9.0ns
90
25
N/A
00
26
N/A
00
27
20ns
14
28
15ns
0F
29
20ns
14
30
31
45.0ns
256MB
2D
40
1. In a registered DIMM, data is delayed an additional clock cycle due to the on-DIMM pipeline register (that is, Device CL [clock
cycles] + 1 = DIMM CAS latency).
2. Minimum application clock cycle time is 7.5ns (133MHz).
3. cc = Checksum Data Byte, 00-FF (Hex).
4. “R” = Alphanumeric revision code, A-Z, 0-9.
5. rr = ASCII coded revision code Byte “R”.
6. ww = Binary coded decimal week code, 01-51 (Decimal) ‘ 01-34 (Hex).
7. yy = Binary coded decimal year code, 0-00 (Decimal) ‘ 00-63 (Hex).
8. ss = Serial number data Byte, 00-FF (Hex).
9. These values apply to PC100 applications only.
相關(guān)PDF資料
PDF描述
IBM13M32734JCA 32M x 72 Two Bank Registered/Buffered SDRAM Module(64M x 64 2組不帶緩沖同步動(dòng)態(tài)RAM模塊)
IBM13M64734BCA 64M x 72 1 Bank Registered/Buffered SDRAM Module(64M x 72 1組寄存/緩沖同步動(dòng)態(tài)RAM模塊)
IBM13M64734CCA 64M x 72 2-Bank Registered/Buffered SDRAM Module(64M x 72 2組寄存/緩沖同步動(dòng)態(tài)RAM模塊)
IBM13M64734HCA 64M x 72 Two-Bank Registered SDRAM Module(64M x 72 2組帶寄存同步動(dòng)態(tài)RAM模塊)
IBM13M8734HCB 8M x 72 1 Bank Registered SDRAM Module with PLL(8M x 72 1組帶鎖相環(huán)的寄存同步動(dòng)態(tài)RAM模塊)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IBM14H5481 制造商:AVED Memory Products 功能描述:
IBM14H5540 制造商:AVED MEMORY PRODUCTS 功能描述: 制造商:AVED Memory Products 功能描述:
IBM17R8251 制造商:AVED Memory Products 功能描述:
IBM17R8252 制造商:AVED Memory Products 功能描述:
IBM1805T 制造商:Schneider Electric 功能描述:IBM1805T
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*