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參數(shù)資料
| 型號(hào)： | HYE18P32160AC-15 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | M39012 MIL RF CONNECTOR |
| 中文描述： | 32M的同步突發(fā)的CellularRAM |
| 文件頁數(shù)： | 31/53頁 |
| 文件大?。?/td> | 1426K |
| 代理商： | HYE18P32160AC-15 |
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Data Sheet
31
V2.0, 2003-12-16
HYE18P32160AC(-/L)9.6/12.5/15
32M Synchronous Burst CellularRAM
Functional Description
2.6
SRAM-Type Mode
In SRAM-type mode the CellularRAM applies the standard asynchronous SRAM protocol to perform read and
write accesses.
2.6.1
After power-up the CellularRAM operates per default in asynchronous SRAM-type mode. The synchronous clock
line, CLK has to be held low, while address latch signal, ADV can be held low for entire read and write operation
in this mode or toggled to latch valid address input (refer to
“Asynchronous Write with Address Latch (ADV)
Control” on Page 40
for details). WAIT is always asserted as BCR. Bit 10 is programmed, so that the controller
should ignore WAIT during asynchronous mode operation.
Reading from the device in asynchronous mode is accomplished by asserting the Chip Select (CS) and Output
Enable (OE) signals to low while forcing Write Enable (WE) to high. If the Upper Byte (UB) control line is set active
low then the upper word of the addressed data is driven on the output lines, DQ15 to DQ8. If the Lower Byte (LB)
control line is set active low then the lower word of the addressed data is driven on the output lines, DQ7 to DQ0.
The access time is determined by the triggering input - slowest one in low-going transition - among valid address
(
t
AA
), CS(
t
CO
), OE(
t
OE
), UB or LB(
t
BA
), or ADV(
t
AADV
).
Asynchronous Read
Figure 13
Asynchronous Read - Address Controlled (CS = OE =
V
IL
, WE =
V
IH
, UB and/or LB =
V
IL
,
CRE =
V
IL,
ADV =
V
IL
)
Figure 14
Asynchronous Read (WE =
V
IH
, CRE =
V
IL
)
Not Valid
A20-A0
ADDRESS
Data Valid
DQ15-DQ0
Previous Data
t
OH
t
AA
t
RC
Don't Care
A20-A0
ADDRESS
CS
UB, LB
OE
Data Valid
WE
DQ15-DQ0
t
CO
t
AA
t
BA
t
OE
t
BLZ
t
OH
t
OHZ
t
BHZ
t
RC
t
OLZ
t
LZ
t
CPH
t
HZ
t
BPH
ADV
t
VPH
t
AADV
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYE18P32161AC-85 | 32M Asynchronous/Page CellularRAM |
| HYE18P32161AC | 32M Asynchronous/Page CellularRAM |
| HYE18P32161ACL70 | JT 23C 21#20 2#16 SKT PLUG |
| HYE18P32161ACL85 | Circular Connector; MIL SPEC:MIL-DTL-38999 Series II; Body Material:Metal; Series:JT; No. of Contacts:11; Connector Shell Size:18; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Body Style:Straight RoHS Compliant: No |
| HYE18P32161AC-70 | 32M Asynchronous/Page CellularRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYE18P32160AC-96 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Synchronous Burst CellularRAM |
| HYE18P32160ACL125 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Synchronous Burst CellularRAM |
| HYE18P32160ACL15 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Synchronous Burst CellularRAM |
| HYE18P32160ACL96 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Synchronous Burst CellularRAM |
| HYE18P32161AC | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Asynchronous/Page CellularRAM |
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