參數(shù)資料
型號(hào): HY29LV400
英文描述: 4M(X8/X16)|3.0V|55|NOR FLASH - 4M
中文描述: 4分(X8/X16)| 3.0V | 55 | NOR閃存- 4分
文件頁(yè)數(shù): 17/40頁(yè)
文件大?。?/td> 550K
代理商: HY29LV400
17
Rev. 1.0/Nov. 01
HY29LV400
Table 7. Write and Erase Operation Status Summary
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Notes:
1. A valid address is required when reading status information. See text for additional information.
2. DQ[5] status switches to a
1
when a program or erase operation exceeds the maximum timing limit.
3. A
1
during sector erase indicates that the 50 μs time-out has expired and active erasure is in progress. DQ[3] is not
applicable to the chip erase operation.
4. Equivalent to
No Toggle
because data is obtained in this state.
5. Data (DQ[7:0]) = 0xFF immediately after erasure.
6. Programming can be done only in a non-suspended sector (a sector not specified for erasure).
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1
3
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4
2
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6
4
WRITE OPERATION STATUS
The HY29LV400 provides a number of facilities to
determine the status of a program or erase op-
eration. These are the RY/BY# (Ready/Busy#)
pin and certain bits of a status word which can be
read from the device during the programming and
erase operations. Table 7 summarizes the status
indications and further detail is provided in the
subsections which follow.
RY/BY# - Ready/Busy#
RY/BY# is an open-drain output pin that indicates
whether a programming or erase Automatic Algo-
rithm is in progress or has completed. A pull-up
resistor to V
CC
is required for proper operation. RY/
BY# is valid after the rising edge of the final WE#
pulse in the corresponding command sequence.
If the output is Low (busy), the device is actively
erasing or programming, including programming
while in the Erase Suspend mode. If the output is
High (ready), the device has completed the op-
eration and is ready to read array data in the nor-
mal or Erase Suspend modes, or it is in the
Standby mode.
DQ[7] - Data# Polling
The Data# (
Data Bar
) Polling bit, DQ[7], indicates
to the host system whether an Automatic Algo-
rithm is in progress or completed, or whether the
device is in Erase Suspend mode. Data# Polling
is valid after the rising edge of the final WE# pulse
in the Program or Erase command sequence.
The system must do a read at the program ad-
dress to obtain valid programming status informa-
tion on this bit. While a programming operation is
in progress, the device outputs the complement
of the value programmed to DQ[7]. When the pro-
gramming operation is complete, the device out-
puts the value programmed to DQ[7]. If a pro-
gram operation is attempted within a protected
sector, Data# Polling on DQ[7] is active for ap-
proximately 1 μs, then the device returns to read-
ing array data.
The host must read at an address within any non-
protected sector specified for erasure to obtain
valid erase status information on DQ[7]. During
an erase operation, Data# Polling produces a
0
on DQ[7]. When the erase operation is complete,
or if the device enters the Erase Suspend mode,
Data# Polling produces a
1
on DQ[7]. If all sec-
tors selected for erasing are protected, Data#
Polling on DQ[7] is active for approximately 100
μs, then the device returns to reading array data.
If at least one selected sector is not protected, the
erase operation erases the unprotected sectors,
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