HT49C10
8
September 28, 1999
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# %
% 6
7
8% % 6 9 7
/
# %
% 6
: 7
8% % 6 7
/
# %
% 6
: 7
8% % 6 : 7
:
:
! % ; <
% 6 % ! 7
Execution flow
Functional Description
Execution flow
The system clock is derived from either a crys-
tal or an RC oscillator. It is internally divided
into four non-overlapping clocks. One instruction
cycle consists of four system clock cycles.
Instruction fetching and execution are pipelined
in such a way that a fetch takes one instruction
cycle while decoding and execution takes the
next instruction cycle. The pipelining scheme
causes each instruction to effectively execute in
a cycle. If an instruction changes the value of
the program counter, two cycles are required to
complete the instruction.
Program counter
PC
The 10-bit program counter (PC) controls the
sequenceinwhichtheinstructionsstoredinthe
program ROM are executed. The contents of
the PC can specify a maximum of 1024 ad-
dresses.
After accessing a program memory word to fetch
an instruction code, the value of the PC is incre-
mented by one. The PC then points to the mem-
ory word containing the next instruction code.
When executing a jump instruction, conditional
skip execution, loading a PCL register, a sub-
routine call, an initial reset, an internal inter-
rupt, an external interrupt, or returning from a
subroutine, the PC manipulates program
transfer by loading the address corresponding
to each instruction.
Theconditionalskipisactivatedbyinstructions.
Once the condition is met, the next instruction,
fetched during the current instruction execu-
tion, is discarded and a dummy cycle replaces it
to get a proper instruction; otherwise proceed
with the next instruction.
The lower byte of the PC (PCL) is a readable
and writeable register (06H). Moving data into
the PCL performs a short jump. The destina-
tion is within 256 locations.
When a control transfer takes place, an addi-
tional dummy cycle is required.
Program memory
ROM
The program memory (ROM) is used to store
the program instructions which are to be exe-
cuted. It also contains data, table, and inter-
rupt entries, and is organized into 1024 14 bits
which are addressed by the PC and table
pointer.
Certain locations in the ROM are reserved for
special usage:
Location 000H
Location 000H is reserved for program initial-
ization. After chip reset, the program always
begins execution at this location.
Location 004H
Location 004H is reserved for the external in-
terrupt service program. If the INT0 input
pin is activated, and the interrupt is enabled,
and the stack is not full, the program begins
execution at location 004H.