參數(shù)資料
型號: HT49C10
廠商: Holtek Semiconductor Inc.
元件分類: 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁數(shù): 20/47頁
文件大?。?/td> 329K
代理商: HT49C10
HT49C10
20
September 28, 1999
Timer/event counter
Atimer/event counter (TMR) is implemented in
the HT49C10. The timer/event counter contains
an 8-bit programmable count-up counter, and the
clock source may come from the system clock or
instructionclock(systemclock/4)orRTCtime-out
signal or external source. System clock source or
instructionclockisselectedbymaskoption.
The external clock input allows the user to
count external events, measure time intervals
or pulse widths, or generate an accurate time
base.
Therearetworegistersrelatedtothetimer/event
counter, i.e., TMR ([0DH]) and TMRC ([0EH]).
And two physical registers are mapped to TMR
location; writing TMR locates the starting value
in the timer/event counter preload register, while
reading it yields the contents of the timer/event
counter. The TMRC is a timer/event counter con-
trol register which defines some options.
The TN0 and TN1 bits define the operation
mode.Theeventcountmodeisusedtocountex-
ternal events, which means that the clock
sourceisfromanexternal(TMR)pin.Thetimer
mode functions as a normal timer with the
clock source coming from the internal selected
clock source. Finally, the pulse width measure-
ment mode can be used to count the high or low
level duration of the external signal (TMR), and
the counting is based on the internal selected
clock source.
In the event count or timer mode, the
timer/event counter starts counting at the cur-
rent contents in the timer/event counter and
ends at FFH. Once an overflow occurs, the
counter is reloaded from the timer/event coun-
ter preload register, and generates an interrupt
request flag (TF; bit 6 of INTC0).
In the pulse width measurement mode with
the values of the TON and TE bits equal to
one, after the TMR has received a transient
from low to high (or high to low if the TE bit is
0 ), it will start counting until the TMR re-
turns to the original level and resets the
TON. The measured result remains in the
timer/event counter even if the activated
transient occurs again. In other words, only
one cycle measurement can be done. Until set-
ting the TON, the cycle measurement will
re-function as long as it receives further tran-
sient pulse. In this operation mode, the
timer/event counter begins counting according
not to the logic level but to the transient edges.
In the case of counter overflows, the counter is
reloaded from the timer/event counter preload
register and issues an interrupt request, as in
the other two modes, i.e., event and timer
modes.
To enable the counting operation, the Timer ON
bit (TON; bit 4 of TMRC) should be set to 1. In
the pulse width measurement mode, the TON
is automatically cleared after the measurement
cycle is completed. But in the other two modes,
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Timer/event counter
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