參數(shù)資料
型號(hào): HT49C10
廠商: Holtek Semiconductor Inc.
元件分類: 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁(yè)數(shù): 14/47頁(yè)
文件大?。?/td> 329K
代理商: HT49C10
HT49C10
14
September 28, 1999
regular real time clock signal. After the inter-
rupt is enabled, and the stack is not full, and
the RTF bit is set, a subroutine call to location
14H occurs. The related interrupt request flag
(RTF) is reset and the EMI bit is cleared to dis-
able further interrupts.
During the execution of an interrupt subroutine,
other interrupt acknowledgments are all held
until the RETI instruction is executed or the
EMI bit and the related interrupt control bit are
set both to 1 (if the stack is not full). To return
from the interrupt subroutine, RET or RETI
may be invoked. RETI sets the EMI bit and en-
ables an interrupt service, but RET does not.
Interrupts occurring in the interval between
the rising edges of two consecutive T2 pulses
are serviced on the latter of the two T2 pulses if
the corresponding interrupts are enabled. In
the case of simultaneous requests, the following
table shows the priority that is applied. These
can be masked by resetting the EMI bit.
No.
Interrupt Source Priority Vector
a
External interrupt 0
1
04H
b
External interrupt 1
2
08H
c
Timer/event
counter overflow
3
0CH
d
Time base interrupt
4
10H
e
Real time clock
interrupt
5
14H
The timer/event counter interrupt request flag
(TF), external interrupt 1 request flag (EIF1),
external interrupt 0 request flag (EIF0), enable
timer/event counter interrupt bit (ETI), enable
external interrupt 1 bit (EEI1), enable external
interrupt 0 bit (EEI0), and enable master inter-
rupt bit (EMI) make up of the interrupt control
register (INTC0) which is located at 0BH in the
RAM. The real time clock interrupt request flag
(RTF), time base interrupt request flag (TBF),
enable real time clock interrupt bit (ERTI), and
enable time base interrupt bit (ETBI), on the
other hand, constitute the other interrupt con-
trol register (INTC1) which is located at 1EH in
the RAM. EMI, EEI0, EEI1, ETI, ETBI, and
ERTI are all used to control the enable/disable
status of the interrupts. These bits prevent the
requested interrupt from being serviced. Once
the interrupt request flags (RTF, TBF, TF,
EIF1, EIF0) are all set, they remain in the
INTC1 or INTC0 respectively until the inter-
rupts are serviced or cleared by a software in-
struction.
It is recommended that a program not use the
CALL subroutine within the interrupt sub-
routine. It s because interrupts often occur in
an unpredictable manner or require to be ser-
viced immediately in some applications. At this
time, if only one stack is left, and enabling the
interrupt is not well controlled, operation of the
call subroutine
in the interrupt subroutine
may damage the original control sequence.
Oscillator configuration
The HT49C10 provides two oscillator circuits
for system clocks, i.e., RC oscillator and crystal
oscillator, determined by mask option. No mat-
ter what type of oscillator is selected, the signal
is used for the system clock. The HALT mode
stops the system oscillator and ignores an ex-
ternal signal to conserve power.
Of the two oscillators, if the RC oscillator is
used, an external resistor between OSC1 and
VSS is required, and the range of the resistance
should be from 51k
to 1M . The system clock,
.
,
RTC oscillator
!
; %
; ;
%
; ;
$
+
' ,
System oscillator
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