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參數(shù)資料
| 型號： | HT49C10 |
| 廠商： | Holtek Semiconductor Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 13/47頁 |
| 文件大?。?/td> | 329K |
| 代理商： | HT49C10 |
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HT49C10
13
September 28, 1999
Register
Bit No.
Label
Function
INTC0
(0BH)
0
EMI
Control the master (global) interrupt
(1= enabled; 0= disabled)
1
EEI0
Control the external interrupt 0
(1= enabled; 0= disabled)
2
EEI1
Control the external interrupt 1
(1= enabled; 0= disabled)
3
ETI
Control the timer/event counter interrupt
(1= enabled; 0= disabled)
4
EIF0
External interrupt 0 request flag
(1= active; 0= inactive)
5
EIF1
External interrupt 1 request flag
(1= active; 0= inactive)
6
TF
Internal timer/event counter request flag
(1= active; 0= inactive)
7
Unused bit, read as 0
INTC1
(1EH)
0
ETBI
Control the time base interrupt
(1= enabled; 0= disabled)
1
ERTI
Control the real time clock interrupt
(1= enabled; 0= disabled)
2, 3
Unused bit, read as 0
4
TBF
Time base request flag
(1= active; 0= inactive)
5
RTF
Real time clock request flag
(1= active; 0= inactive)
6, 7
Unused bit, read as 0
INTC register
interrupt request flag (EIF0; bit 4 of INTC0,
EIF1; bit 5 of INTC0) is set as well. After the in-
terrupt is enabled, and the stack is not full, and
the external interrupt is active, a subroutine
call to location 04H or 08H occurs. The inter-
rupt request flag (EIF0 or EIF1) and EMI bits
are all cleared to disable other interrupts.
The internal timer/event counter interrupt is
initialized by setting the timer/event counter
interrupt request flag (TF; bit 6 of INTC0), that
is caused by a timer overflow. After the inter-
rupt is enabled, and the stack is not full, and
the TF bit is set, a subroutine call to location
0CH occurs. The related interrupt request flag
(TF) is reset, and the EMI bit is cleared to dis-
able further interrupts.
The time base interrupt is initialized by setting
the time base interrupt request flag (TBF; bit 4
of INTC1), that is caused by a regular time base
signal. After the interrupt is enabled, and the
stack is not full, and the TBF bit is set, a sub-
routine call to location 10H occurs. The related
interrupt request flag (TBF) is reset and the
EMIbitisclearedtodisablefurtherinterrupts.
The real time clock interrupt is initialized by
setting the real time clock interrupt request
flag (RTF; bit 5 of INTC1), that is caused by a
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PDF描述 |
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| HT49C30L | HDSP-A101 RED DISPLAY, LED, |
| HT49R30 | DISPLAY 7 SEGMENT |
| HT49R30A-1 | DISPL 7 SEG YELLOW |
| HT49C30-1 | 8-Bit LCD Type MCU |
| HT49C50 | 8-BIT MICROCONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HT49C10(48SSOP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| HT49C10-1 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:LCD Type 8-Bit MCU |
| HT49C10-1_12 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:LCD Type 8-Bit MCU |
| HT49C30-1 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:8-Bit LCD Type MCU |
| HT49C30-1_12 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:LCD Type 8-Bit MCU |
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