- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370645 > HN29W6484DH08TE (Hitachi,Ltd.) Controller for AND Flash Memory(AND型閃速存儲(chǔ)器控制器) PDF資料下載
參數(shù)資料
| 型號(hào)： | HN29W6484DH08TE |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Controller for AND Flash Memory(AND型閃速存儲(chǔ)器控制器) |
| 中文描述： | 控制器及快閃記憶體（及型閃速存儲(chǔ)器控制器） |
| 文件頁數(shù)： | 19/74頁 |
| 文件大?。?/td> | 251K |
| 代理商： | HN29W6484DH08TE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁
HN29W6484DH08TE-1
19
2. Configuration and Status register (Address 202H)
This register is used for observing the card state.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
CHGED
Note: initial value: 00H
SIGCHG
IOIS8
0
0
PWD
INTR
0
Name
R/W
Function
CHGED
(CARD->)
R
This bit indicates that CRDY/-BSY bit on Pin Replacement register is set to "1". When
CHGED bit is set to "1", -STSCHG pin is held "L" at the condition of SIGCHG bit set to
"1" and the card configured for the I/O interface.
SIGCHG
(HOST->)
R/W
This bit is set or reset by the host for enabling and disabling the status-change signal (-
STSCHG pin). When the card is configured I/O card interface and this bit is set to "1", -
STSCHG pin is controlled by CHGED bit. If this bit is set to "0", -STSCHG pin is kept
"H".
IOIS8
(HOST->)
R/W
The host sets this field to "1" when it can provide I/O cycles only with on 8 bit data bus
(D7 to D0).
PWD
(HOST->)
R/W
When this bit is set to "1", the card enters sleep state (Power Down mode). When this
bit is reset to "0", the card transfers to idle state (active mode). RRDY/-BSY bit on Pin
Replacement Register becomes BUSY when this bit is changed. RRDY/-BSY will not
become Ready until the power state requested has been entered. This card
automatically powers down when it is idle, and powers back up when it receives a
command.
INTR
(CARD->)
R
This bit indicates the internal state of the interrupt request. This bit state is available
whether I/O card interface has been configured or not. This signal remains true until the
condition which caused the interrupt request has been serviced. If interrupts are
disabled by the -IEN bit in the Device Control Register, this bit is a zero.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HN29WB800 | 1048576-word x 8-bit / 524288-word x 16-bit CMOS Flash Memory |
| HN29WT800 | 1048576-word x 8-bit / 524288-word x 16-bit CMOS Flash Memory |
| HN462532 | 4096-word X 8-bit UV Erasable and Programmable Read Only Memory |
| HN462716 | 2048-WORD x 8-BIT UV ERASABLE AND ELECTRICALLY PROGRAMMABLE ONLY MEMORY |
| HN462716G | 2048-WORD x 8-BIT UV ERASABLE AND ELECTRICALLY PROGRAMMABLE ONLY MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HN29W64AH05TE-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MEMORY CONTROLLER |
| HN29W8411SERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AND Flash EEPROM |
| HN29WB800 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1048576-word x 8-bit / 524288-word x 16-bit CMOS Flash Memory |
| HN29WB800FP-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8/x16 Flash EEPROM |
| HN29WB800FP-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8/x16 Flash EEPROM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。