參數(shù)資料
型號： HFA3863
廠商： Intersil Corporation
元件分類： 基帶處理器
英文描述： Direct Sequence Spread Spectrum Baseband Processor(直接序列擴譜基帶處理器)
中文描述： 直接序列擴頻基帶處理器（直接序列擴譜基帶處理器）
文件頁數(shù)： 29/39頁
文件大?。?/td> 305K
代理商： HFA3863
4-29
CONFIGURATION REGISTER 23 ADDRESS (2Eh) R/W AGC TABLE DATA
Bits 7
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bits 6:0
AGC look up table data, unsigned.
CONFIGURATION REGISTER 24 ADDRESS (30h) R/W AGC LOOP GAIN
Bits 7
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 6:0
AGC loop gain (0.xxxx - x.00000, 0 - 1.0000 range), nominally 0.7.
CONFIGURATION REGISTER 25 ADDRESS (32h) R/W AGC RX_IF AND RF
Bits 7
AGC RX_RF, This input drives the RX-RF control if AGC override Enable is set to 1.
When Polarity bit (CR26[6]) is zero:
1 = removes 30dB pad.
0 = inserts 30dB pad.
Bits 6:0
AGC RX_IF, This CR is input to RF-IF DAC if AGC override Enable (CR 26[2]) is set to 1.
CONFIGURATION REGISTER 26 ADDRESS (34h) R/W AGC TEST MODES
Bits 7
AGC continuous update.
0 = disable, no updates during AGC freeze.
1 = allow updates during freeze AGC and AGC_lock.
See also CR17[7].
Bit 6
rxRFAGC polarity control.
0 = normal.
1 = invert.
Bit 5
AGC extra update disable. Allows final 32 sample update tweak after AGC_lock is declared.
0 = enable an extra update.
1 = disable extra update.
Bits 3:4
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 2
AGC override Enable.
0 = normal, disabled.
1 = enabled, CR25 controls receiver gain in both RF and IF via RXRF_AGC and RXIF_AGC lines.
Bit 1
AGC 2nd antenna power abort.
0 = AGC lock on 2nd antenna is required to finish antenna dwell.
1 = abort 2nd antenna lock search immediately if power is lower on 2nd antenna than on 1st antenna.
Bit 0
AGC Sat Step disable if within CR29[7:5] window.
0 = disable sat step.
1 = enable sat step.
CONFIGURATION REGISTER ADDRESS 27 (36h) R/W AGC RF THRESHOLD
Bit 7
RXRF AGC disable.
0 = normal.
1 = disables threshold.
Bits 6:0
RF AGC threshold (0-64 range). The RxRf_Agc pad is removed if the AGC voltage falls below this threshold.
CONFIGURATION REGISTER ADDRESS 28 (38h) R/W AGC LOW SAT ATTENUATOR
Bits 7:4
Mid saturation attenuation (0-30 range). Note: mid saturation attenuation is programmed as this value times 2. The mid and
low attenuator steps will occur if the number of I and Q saturations are greater than the mid and low saturation counts set by
CR16.
Bits 3:0
low saturation attenuation (0-15 range).
CONFIGURATION REGISTER ADDRESS 29 (3Ah) R/W AGC LOCK WINDOW NEGATIVE SIDE
Bits 7:5
AGC Saturation Block Level, 1xx.x, range 4.0 to 7.5 dB. Disable saturation attenuation step if less than or equal to this level.
Bits 4:0
AGC lock window negative side. (0-15.5 range) (this is the outer lock window) Note: set as a positive number, logic will convert
to negative.
HFA3863
相關(guān)PDF資料
PDF描述
HFA3983IV96 2.4GHz Power Amplifier and Detector
HFA3983 2.4GHz Power Amplifier and Detector(2.4GHz 功率放大器探測器)
HFA3983IV 2.4GHz Power Amplifier and Detector
HFB60HF20 200V 60A Hi-Rel Ultra-Fast Discrete Diode in a SMD-1 package
HFB60HF20C 200V 60A Hi-Rel Ultra-Fast Common Cathode Diode in a SMD-1 package
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HFA3863IN 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor
HFA3863IN96 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor
HFA3925 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:null2.4GHz - 2.5GHz 250mW Power Amplifier
HFA3925IA 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:
HFA3925IA1K 制造商:Rochester Electronics LLC 功能描述:- Bulk
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*