參數(shù)資料
型號： HD66732
廠商： Hitachi,Ltd.
英文描述： Graphics Liquid Crystal Display Controller/Driver Supporting JIS Level-1 and Level-2 Kanji ROM(圖形LCD控制器/驅(qū)動器)
中文描述： 圖形液晶顯示控制器/驅(qū)動器支持日標(biāo)級- 1和第2級漢字光盤（圖形液晶顯示控制器/驅(qū)動器）
文件頁數(shù)： 17/133頁
文件大?。?/td> 2608K
代理商： HD66732
HD66732
17
Half-size Character Generator ROM (HCGROM)
Half-size character generator ROM (HCGROM) generates 6 x 12-dot character patterns from 7-bit
character codes. It is equipped with two banks of 128 half-size font patterns, and 256 half-size fonts in
total. For details, see the Combined Display of Full-size and Half-size Characters section and the Display
Attribute Designation section.
Character Generator RAM (CGRAM)
Character generator RAM (CGRAM) allows the user to redefine the character patterns in the character
display mode. Up to 40 character patterns of 12 x 13-dot characters can be simultaneously displayed.
DRAM-specified character code can be selected to display one of these user font patterns.
The CGRAM serves as a RAM to store 120 x 52-dot bit pattern data in the graphics display mode. Here,
display patterns are directly written into CGRAM. Character codes set in the DDRAM are not used. For
details, see the Character Display Functions and Graphics Display Functions section.
Segment RAM (SEGRAM)
The segment RAM (SEGRAM) is used to enable control of segments such as icons and marks through the
user program. Segments and characters are driven by a multiplexing drive method.
The SEGRAM has a capacity of 120 x 4 bits, and can control a display of up to 200 icon segments. Since
40 segments can be controlled by grayscale. While COMS1 and COMS2 outputs are being selected, 120
segments are driven. The 40 grayscale-controlled segments output the same display data in both the
COMS1 drive and COMS2 drive modes.
Bits in the SEGRAM corresponding to segments to be displayed are set directly by the MPU, regardless of
the contents of the DDRAM and CGRAM.
Timing Generator
The timing generator generates timing signals for the operation of internal circuits such as DDRAM,
CGROM, CGRAM, and SEGRAM. The RAM read timing for display and internal operation timing by
MPU access are generated separately to avoid interference with one another. This prevents flickering in
areas other than the display area when writing data to DDRAM, for example.
Cursor/Blink Controller
The cursor/blink (or black-white reversed) control is used to create a cursor or a flashing area on the
display in a position corresponding to the location stored in the address counter (AC).
相關(guān)PDF資料
PDF描述
HD66740TB0 50/MDR/RECP/VERT PRS FIT/M2.6/SCW/30MIN
HD66740WTB0 112 x 80-dot Graphics LCD Controller/Driver
HD66751 128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions
HD66750TB0 122 x 32 pixel format, Compact LCD size
HD66750 128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HD66735 制造商:未知廠家 制造商全稱:未知廠家 功能描述:HD66735 Procedure for setting Standby/Sleep/Display off mode. Technical Update/Device
HD66740 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
HD66740TB0 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:112 x 80-dot Graphics LCD Controller/Driver
HD66740WTB0 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:112 x 80-dot Graphics LCD Controller/Driver
HD66741 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions
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